参数资料
型号: IP2005CPBF
厂商: International Rectifier
文件页数: 10/15页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 40A LGA
标准包装: 10
系列: iPOWIR™
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 5.5 V
输入电压: 2.5 V ~ 13.2 V
频率 - 开关: 250kHz ~ 1.5MHz
电流 - 输出: 40A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-LLGA
包装: 管件
供应商设备封装: 8-LGA
i P2005CPbF
PD-60360
Internal Block Diagram
Figure 12 Internal Block Diagram
Pin Description
Pin Number
1
2
3
4
5
6
7,8
Pin Name
V IN
V SW
PGND
V DD
PWM
ENABLE
N/C
Description
Input voltage pin. Connect input capacitors close to this pin.
Voltage Switching Node – pin connection to the output inductor.
Power Ground
Supply voltage to internal circuitry.
TTL level input to MOSFET drivers. When PWM is HIGH, the Control
FET is on and the Sync FET is off. When PWM is LOW, the Sync FET
is on and the Control FET is off.
When set to logic level high, internal circuitry of the device is enabled.
When set to logic level low, the Control and Synchronous FETs are
turned off.
No Connection, can be left floating. (Note A)
Notes:
A. It is recommended to connect PIN 7 and 8 to PIN 1 on PCB to reduce thermal resistance.
www.irf.com
04/09/2009
10
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