- 您现在的位置：买卖IC网 > PDF目录16072 > IPR-RSDEC (Altera)IP REED-SOLOMON DECODER RENEW PDF资料下载
参数资料
| 型号： | IPR-RSDEC |
| 厂商： | Altera |
| 文件页数： | 18/38页 |
| 文件大小： | 0K |
| 描述： | IP REED-SOLOMON DECODER RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | Reed-Solomon 解码器 |
| 许可证： | 续用许可证 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页当前第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页
2–8
Chapter 2: Getting Started
MegaWizard Plug-In Flow
1. Click Step 3: Generate in IP Toolbench ( Figure 2–3 on page 2–4 ).
The generation phase may take several minutes to complete. The generation
progress and status is displayed in a report window.
Figure 2–8 shows the generation report.
Figure 2–8. Generation Report
Table 2–1 describes the generated files and other files that may be in your project
directory. The names and types of files specified in the IP Toolbench report vary
based on whether you created your design with VHDL or Verilog HDL
Table 2–1. Generated Files (Part 1 of 2)
Filename
< variation name > .bsf
< variation name > .vo or .vho
< variation name >. vhd , or .v
< variation name >. cmp
< variation name > _nativelink.tcl
< variation name > _syn.v or .vhd
Reed-Solomon Compiler
User Guide
(1)
Description
Quartus II symbol file for the MegaCore function variation. You can use
this file in the Quartus II block diagram editor.
VHDL or Verilog HDL IP functional simulation model.
A MegaCore function variation file, which defines a VHDL or Verilog HDL
top-level description of the custom MegaCore function. Instantiate the
entity defined by this file inside of your design. Include this file when
compiling your design in the Quartus II software.
A VHDL component declaration for the custom MegaCore function. Add
the contents of this file to any VHDL architecture that instantiates the
MegaCore function.
Tcl Script that sets up NativeLink in the Quartus II software to natively
simulate the design using selected EDA tools.
A timing and resource netlist for use in some third-party synthesis tools.
November 2013 Altera Corporation
相关PDF资料 |
PDF描述 |
|---|---|
| EMM10DRSI | CONN EDGECARD 20POS DIP .156 SLD |
| UCL1C221MCL6GS | CAP ALUM 220UF 16V 20% SMD |
| 135104-01-36.00 | CBL SMA R/A PLUG-PLUG RG316 36" |
| UCL1C680MCL1GS | CAP ALUM 68UF 16V 20% SMD |
| 336306-12-0300 | CABL AMC-SMA RP BLKHD JACK 300MM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-RSENC | 功能描述:开发软件 Reed-Solomon Encoder MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IP-RSCODECII | 功能描述:开发软件 Reed-Solomon Enc Dec MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IP-RSDEC | 功能描述:开发软件 Reed-Solomon Decoder MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SDI | 功能描述:开发软件 Video Interface SDI MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SDI-II | 功能描述:开发软件 SDI II Video MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
发布紧急采购，3分钟左右您将得到回复。