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| 型号： | IR2130J |
| 厂商： | International Rectifier |
| 文件页数： | 2/26页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER BRIDGE 3-PHASE 44-PLCC |
| 标准包装： | 27 |
| 配置： | 3 相桥 |
| 输入类型： | 反相 |
| 延迟时间： | 675ns |
| 电流 - 峰： | 200mA |
| 配置数： | 1 |
| 输出数： | 3 |
| 高端电压 - 最大（自引导启动）： | 600V |
| 电源电压： | 10 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-PLCC（32 引线） |
| 供应商设备封装： | 44-PLCC，32 引线 |
| 包装： | 管件 |
| 其它名称： | *IR2130J |
IR2130/IR2132(J)(S) & (PbF)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to V S0 . The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 50 through 53.
Symbol
V B1,2,3
V S1,2,3
V HO1,2,3
V CC
V SS
V LO1,2,3
V IN
Definition
High Side Floating Supply Voltage
High Side Floating Offset Voltage
High Side Floating Output Voltage
Low Side and Logic Fixed Supply Voltage
Logic Ground
Low Side Output Voltage
Logic Input Voltage ( HIN1,2,3 , LIN1,2,3 & ITRIP)
Min.
-0.3
V B1,2,3 - 25
V S1,2,3 - 0.3
-0.3
V CC - 25
-0.3
V SS - 0.3
Max.
625
V B1,2,3 + 0.3
V B1,2,3 + 0.3
25
V CC + 0.3
V CC + 0.3
(V SS + 15) or
Units
V
(V CC + 0.3)
whichever is
lower
V FLT
V CAO
V CA-
FAULT Output Voltage
Operational Amplifier Output Voltage
Operational Amplifier Inverting Input Voltage
V SS - 0.3
V SS - 0.3
V SS - 0.3
V CC + 0.3
V CC + 0.3
V CC + 0.3
dV S /dt
Allowable Offset Supply Voltage Transient
—
50
V/ns
P D
Rth JA
T J
Package Power Dissipation @ T A ≤ +25 ° C
Thermal Resistance, Junction to Ambient
Junction Temperature
(28 Lead DIP)
(28 Lead SOIC)
(44 Lead PLCC)
(28 Lead DIP)
(28 Lead SOIC)
(44 Lead PLCC)
—
—
—
—
—
—
—
1.5
1.6
2.0
83
78
63
150
W
° C/W
T S
T L
Storage Temperature
Lead Temperature (Soldering, 10 seconds)
-55
—
150
300
° C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to V S0 . The V S offset rating is tested
with all supplies biased at 15V different ial. Typical ratings at other bias conditions are shown in Figure 54.
Symbol
Definition
Min.
Max.
Units
V B1,2,3
V S1,2,3
High Side Floating Supply Voltage V S1,2,3 + 10 V S1,2,3 + 20
High Side Floating Offset Voltage Note 1 600
V HO1,2,3
High Side Floating Output Voltage V S1,2,3
V B1,2,3
V CC
V SS
V LO1,2,3
Low Side and Logic Fixed Supply Voltage 10 20
Logic Ground -5 5
Low Side Output Voltage 0 V CC
V IN
V FLT
V CAO
V CA-
Logic Input Voltage ( HIN1,2,3 , LIN1,2,3 & ITRIP) V SS
FAULT Output Voltage V SS
Operational Amplifier Output Voltage V SS
Operational Amplifier Inverting Input Voltage V SS
V SS + 5
V CC
V SS + 5
V SS + 5
V
T A
Ambient Temperature -40 125
° C
Note 1: Logic operational for V S of (V S0 - 5V) to (V S0 + 600V). Logic state held for V S of (V S0 - 5V) to (V S0 - V BS ).
(Please refer to the Design Tip DT97-3 for more details).
Note 2: All input pins, CA- and CAO pins are internally clamped with a 5.2V zener diode.
2
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