参数资料
型号: IR21571S
厂商: International Rectifier
文件页数: 16/18页
文件大小: 0K
描述: IC BALLAST CONTROL 16-SOIC
其它有关文件: 16-lead SOIC Narrow Package
标准包装: 45
类型: 镇流器控制器
频率: 45.5 ~ 50.5 kHz
电流 - 电源: 5.5mA
电流 - 输出: 500mA
电源电压: 11.4 V ~ 15.6 V
工作温度: -40°C ~ 125°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC N
包装: 管件
其它名称: *IR21571S
IR21571(S) & (PbF)
power supply to the upper gate driver CMOS circuitry.
rectifie
d
AC line
+V BUS
Since the quiescent current in this CMOS circuitry is
very low (typically 45 μ A in the on-state), the majority
/ 2
VDC
CPH
RPH
RT
1
2
3
4
16
15
14
13
HO
VS
VB
VCC
R GHS
C BOOT
D BOOT
R SUPPLY
D1
Q1
1
C SNUBBER
Bridge
output
of the drop in the V BS voltage when Q1 is on occurs
due to the transfer of charge from the bootstrap
capacitor to the gate of the power MOSFET.
VB should be bypassed to VS as close as possible to
the leads of the IC with a low ESR/ESL capacitor. A
RUN
5
12
COM
C VCC
PCB layout example is shown in figure 20. A rule of
CT
DT
OC
6
7
8
11
10
9
LO
CS
SD
R GLS
R3
Q2
D2
thumb for the value of this capacitor is to keep its
minimum value at least 50 times the value of the total
input capacitance (Ciss) of the MOSFET or IGBT being
driven. In addition, the VS lead should be connected
R CS
directly to the high side power MOSFET source.
V BUS return
Figure 19: Typical bootstrap supply connection
with V CC charge pump from half-bridge output
(shaded area)
A high voltage, fast recovery diode D BOOT (the so-
called bootstrap diode) is connected between V CC
(anode) and VB (cathode), and a capacitor C BOOT
(the so-called bootstrap capacitor) is connected
between the VB and VS leads. During half-bridge
IR21571
pin 1
C VCC (surface mount)
C BOOT (surface mount)
D Boot (surface mount)
C VCC (through hole)
switching, when MOSFET Q2 is on and Q1 is off, the
bootstrap capacitor C BOOT is charged from the V CC
decoupling capacitor, through the bootstrap diode
D BOOT , and through Q2. Alternately, when Q2 is off
and Q1 is on, the bootstrap diode is reverse-biased,
and the bootstrap capacitor (which ‘floats’ on the
source of the upper power MOSFET) serves as the
16
Figure 20: Supply bypassing PCB layout example
www.irf.com
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