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参数资料
| 型号： | IR2161STRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC HALOGEN CONVERTER CTLR 8-SOIC |
| 标准包装： | 2,500 |
| 类型： | 卤素灯驱动器 |
| 频率： | 34 ~ 70 kHz |
| 电流 - 电源： | 10mA |
| 电流 - 输出： | 300mA |
| 电源电压： | 12.1 V ~ 15.4 V |
| 工作温度： | -25°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 带卷 (TR) |
| 配用： | IRPLHALO1E-ND - KIT HALOGIN CONVERTER 100VA |
IR2161( S ) & (PbF)
convertor is close to maximum load. If the load is reduced,
the average level at which the ripple occurs (i.e. the DC
component) will be at a lower level.
CS
I_SC
12V
S
R
Q
Q
Enable Outputs
1.2V
Shut Down Circuit
Shutdown Function
I_OL
2.5V
Switch
CSD
I_RESET
4V
The IR2161 contains a dual mode auto-resetting shutdown
circuit that detects both a short circuit or overload condition
in the convertor. The load current detected at the CS pin is
used to sense these conditions. If the output of the convertor
is short-circuited, a very high current will flow in the half
bridge and the system must shut down within a few mains
half cycles, otherwise the MOSFETs will rapidly be destroyed
due to excessive junction temperature. The internal CS pin
has an internal threshold (V CSSC ). There also exists a lower
threshold so that if the voltage exceeds this level for more
than 50mS, the system will shut down.
A delay is included to prevent false tripping either due to
lamp inrush current at switch on (this current is still higher
than normal with the soft start operation) or transient
currents that may occur if an external triac based phase
cut dimmer is being used.
There also exists a lower threshold (V CSOL ), which has a
much longer delay before it shuts down the system. This
provides the overload protection if an excessive number of
lamps is connected to the output or the output is short-
circuited at the end of a length of cable that has sufficient
resistance to prevent the current from being large enough
to trip the short circuit protection. Also under this condition
there is an excessive current in the half bridge that is
sufficient to cause heating and eventual failure but over a
longer period of time. The threshold for overload shutdown
is approximately 50% above maximum load with a delay of
approximately 0.5s. These timings are based on a current
waveform that has a sinusoidal envelope and a high
frequency square wave component with 50% duty cycle.
Both shutdown modes are auto resetting, which allows the
oscillator to start again approximately 1.5s after shutting
down. This is so that if the fault condition is removed the
system can start operating normally again without the line
voltage having to be switched off and back on again. It also
provides a good indication of overload to the end user as all
the lamps connected to the system will flash on and off
continuously if too many are connected.
The shut down circuit also uses the external CSD capacitor for
it?s timing functions. When the 0.5V threshold (V CSOL ) is ex-
ceeded at CS the CSD is internally disconnected from the voltage
compensation circuit and connected to the shutdown circuit.
www.irf.com
0.54V
Overload Function
Figure 8, Shut Down Circuit.
The oscillator operates at minimum frequency when the
CSD capacitor is required for shutdown circuit timing.
During soft start or run mode, if the 0.5V threshold (V CSOL )
is exceeded the IR2161 charges CSD rapidly to approxi-
mately 5V (V CSDOL ).
When the voltage at the CS input is greater than 0.5V, the
CSD capacitor is charged by current source I OL and when
the short circuit threshold of 1.2V is exceeded it is charged
by I SC as well. If 1.2V is exceeded CSD will charge from 5V
(V CSDOL ) to 12V (V CSDSD ), in approximately 50ms. When
0.5V is exceeded but 1.2V is not, CSD charges from 5V
(V CSDOL ) to 12V (V CSDSD ) in approximately 0.5s. It should
be remembered that, the timing accounts for the fact that
high frequency pulses with approximately 50% duty cycle
and a sinusoidal envelope appear at the CS pin.
The values of I SC and I OL take into account that only at the
peak of the mains will the comparator outputs go high and
effectively the capacitor will be charged in steps each line
half cycle. Once VCSD reaches 12V (V CSDSD ), VCSD
discharges down to 2.4V (V CSDRS ) and the system starts
up again. If the fault mode is still present, CSD starts
charging again.
If a fault is detected but goes away before CSD reaches
12V (V CSDSD ), then CSD will discharge to 2.4V (V CSDRS )
and then the system will revert to compensation mode
without interruption of the output.
Following a shutdown, when the system starts up again
after the delay, the CSD capacitor will be internally switched
back to the voltage compensation circuit. However, if the
fault is still present the system will switch CSD back to the
shutdown circuit again.
11
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