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参数资料
| 型号： | IR21814PBF |
| 厂商： | International Rectifier |
| 英文描述： | HIGH AND LOW SIDE DRIVER |
| 中文描述： | 高端和低端驱动 |
| 文件页数： | 2/21页 |
| 文件大小： | 364K |
| 代理商： | IR21814PBF |
IR2181
(
4
) (S) & (PbF)
2
www.irf.com
Symbol
Definition
Min.
Max.
Units
V
B
High side floating absolute voltage
-0.3
625
V
S
High side floating supply offset voltage
V
B
- 25
V
B
+ 0.3
V
HO
High side floating output voltage
V
S
- 0.3
V
B
+ 0.3
V
CC
Low side and logic fixed supply voltage
-0.3
25
V
LO
Low side output voltage
-0.3
V
CC
+ 0.3
V
IN
Logic input voltage (HIN & LIN - IR2181/IR21814)
V
SS
- 0.3 V
SS
+ 10
V
SS
Logic ground (IR21814 only)
V
CC
- 25
V
CC
+ 0.3
dV
S
/dt
Allowable offset supply voltage transient
—
50
V/ns
P
D
Package power dissipation @ T
A
≤
+25
°
C
(8-lead PDIP)
—
1.0
(8-lead SOIC)
—
0.625
(14-lead PDIP)
—
1.6
(14-lead SOIC)
—
1.0
Rth
JA
Thermal resistance, junction to ambient
(8-lead PDIP)
—
125
(8-lead SOIC)
—
200
(14-lead PDIP)
—
75
(14-lead SOIC)
—
120
T
J
Junction temperature
—
150
T
S
Storage temperature
-50
150
T
L
Lead temperature (soldering, 10 seconds)
—
300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
V
°
C/W
W
°
C
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: HIN and LIN pins are internally clamped with a 5.2V zener diode.
VB
High side floating supply absolute voltage
V
S
+ 10
V
S
+ 20
V
S
High side floating supply offset voltage
Note 1
600
V
HO
High side floating output voltage
V
S
V
B
V
CC
Low side and logic fixed supply voltage
10
20
V
LO
Low side output voltage
0
V
CC
V
IN
Logic input voltage (HIN & LIN - IR2181/IR21814) V
SS
V
SS
+ 5
V
SS
Logic ground (IR21814/IR21824 only)
-5
5
T
A
Ambient temperature
-40
125
°
C
V
Symbol
Definition
Min.
Max.
Units
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
and V
SS
offset rating are tested with all supplies biased at 15V differential.
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