参数资料
型号: IR22381QPBF
厂商: International Rectifier
英文描述: 3-PHASE AC MOTOR CONTROLLER IC
中文描述: 3相AC电机控制IC
文件页数: 27/30页
文件大小: 1133K
代理商: IR22381QPBF
IR22381Q
PBF
/IR21381Q
(
P
b
F
)
27
Table 3: RGoff sizing
IGBT
Vth(min)
CRESoff
RGoff
GB15XP120K*
GB05XP120K
IRG4PH20K(D)
* sized with 18V supply
3
PCB LAYOUT TIPS
5
5
5
38pF
12pF
11pF
RGoff = 0
RGoff
55
RGoff
63
3.1
Distance from H to L voltage
The IR22381/IR21381Q pin out lacks some pins
(see Figure 17) maximizing the distance between
floating (from DC- to DC+) and low voltage pins . It’s
strongly recommended to place components tied to
floating voltage in the respective high voltage
portions of the device (VB
1,2,3
, VS
1,2,3
) side.
3.2
Ground plane
Ground plane must not be placed under or nearby
the high voltage floating side to minimize noise
coupling.
3.3
Gate drive loops
Current loops behave like an antenna able to
receive and transmit EM noise. In order to reduce
EM coupling and improve the power switch turn
on/off performances, gate drive loops must be
reduced as much as possible. Figure 23 shows the
high and low side gate loops.
Moreover, current can be injected inside the gate
drive loop via the IGBT collector-to-gate parasitic
capacitance. The parasitic auto-inductance of the
gate loop contributes to develop a voltage across
the gate-emitter increasing the possibility of self
turn-on effect. For this reason is strongly
recommended to place the three gate resistances
close together and to minimize the loop area (see
Figure 27).
Figure 27:
gate drive loop
3.4
Supply capacitors
IR22381 output stages are able to quickly turn on
IGBT with up to 460mA of output current. The
supply capacitors must be placed as close as
possible to the device pins (V
CC
and V
SS
for the
ground tied supply, V
B
and V
S
for the floating
supply)
in
order
to
inductance/resistance.
minimize
parasitic
3.5
Routing and placement
example
Figure 28 shows one of the possible layout
solutions using a 3 layer PCB (low voltage signals
not shown) on an ECONO PIM module. This
example takes into account all the previous
considerations. Placement and routing for supply
capacitors and gate resistances in the high and low
voltage side minimize respectively supply path and
gate drive loop. The bootstrap diode is placed under
the device to have the cathode as close as possible
to bootstrap capacitor and the anode far from high
voltage and close to V
CC
.
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