参数资料
型号: IR3080MTR
厂商: International Rectifier
英文描述: XPHASE VRD10 CONTROL IC WITH VCCVID & OVERTEMP DETECT
中文描述: XPHASE VRD10控制集成电路VCCVID
文件页数: 16/41页
文件大小: 2267K
代理商: IR3080MTR
IR3080
VCC VID Linear Regulator and VID Power Good
The IR3080 integrates a fully protected 1.2V/150mA VCCVID linear regulator with over-current protection. Power for
the VCCVID regulator is drawn from the VIDPWR pin which is typically connected to a 3.3V supply. If the linear
regulator output voltage is above 1.1V for a time period programmed by a capacitor between VIDDEL and LGND,
the VIDPGD pin will send out a VID power good signal and start-up of the converter is allowed. The PWRGD pin is
an open-collector output and should be pulled up to a voltage source through a resistor.
An external NPN transistor can be used to enhance the current capability of the linear regulator, as shown in Figure
10. The 5 ohm resistor provides loop compensation and over-current protection.
1.8V
0.1uF
IR3080
CONTROL
IC
V
3
VIDFB
1
VCCVID
2
VIDPWR
3
VID5
4
VID0
5
VID1
6
VID2
7
VID3
8
P
3
T
1
T
1
V
1
T
1
T
1
V
1
S
2
V
3
R
1
V
9
V
2
H
2
R
2
L
2
VCC
24
VBIAS
23
BBFB
22
EAOUT
21
FB
20
VDRP
19
IIN
18
OCSET
17
2.5-3.3V
VCCVID
VOUT SENSE-
1uF
5 OHM
Figure 10. VCC VID linear regulator using external transistor
Soft Start, Over-Current Fault Delay, and Hiccup Mode
The IR3080 has a programmable soft-start function to limit the surge current during the converter start-up. A
capacitor connected between the SS/DEL and LGND pins controls soft start as well as over-current protection delay
and hiccup mode timing. A charge current of 70uA and discharge current of 6uA control the up slope and down
slope of the voltage at the SS/DEL pin respectively
Figure 11 depicts the various operating modes as controlled by the SS/DEL function. If there is no fault, the SS/DEL
capacitor pin will begin to be charged. The error amplifier output is clamped low until SS/DEL reaches 1.3V. The
error amplifier will then regulate the converter’s output voltage to match the SS/DEL voltage less the 1.3V offset
until it reaches the level determined by the VID inputs. The SS/DEL voltage continues to increase until it rises above
3.91V and allows the PWRGD signal to be asserted. SS/DEL finally settles at 4V, indicating the end of the soft start.
Under Voltage Lock Out, a VID=11111x, and VCC VID faults immediately set the fault latch causing SS/DEL to
begin to discharge. The SS/DEL capacitor will continue to discharge down to 0.2V. If the fault has cleared the fault
latch will be reset by the discharge comparator allowing a normal soft start to occur.
A delay is included if an over-current condition occurs after a successful soft start sequence. This is required since
over-current conditions can occur as part of normal operation due to load transients or VID transitions. If an over-
current fault occurs during normal operation it will initiate the discharge of the capacitor at SS/DEL but will not set
the fault latch immediately. If the over-current condition persists long enough for the SS/DEL capacitor to discharge
below the 90mV offset of the delay comparator, the Fault latch will be set pulling the error amplifier’s output low
inhibiting switching in the phase ICs and de-asserting the PWRGD signal. The SS/DEL capacitor will continue to
discharge until it reaches 0.2V and the fault latch is reset allowing a normal soft start to occur. If an over-current
condition is again encountered during the soft start cycle the fault latch will be set without any delay and hiccup
mode will begin. During hiccup mode the charge to discharge current ratio results in a fixed 7.9% hiccup mode duty
cycle regardless of at what point the over-current condition occurs. However, the hiccup frequency is determined by
the load current and over-current set value.
Page 16 of 41
9
/30/04
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