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参数资料
| 型号： | IR3092 |
| 厂商： | International Rectifier |
| 英文描述： | 2 PHASE OPTERON, ATHLON, OR VR10.X CONTROL IC |
| 中文描述： | 2相皓龙，速龙，或控制IC的VR10.X |
| 文件页数： | 2/37页 |
| 文件大小： | 619K |
| 代理商： | IR3092 |
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IR3092
Page 2 of 37
06/25/04
PIN DESCRIPTION
PIN# PIN SYMBOL PIN DESCRIPTION
1
VID3
2
VID4
3
ROSC
4
VOSNS-
Inputs to VID D to A Converter
Inputs to VID D to A Converter
Connect a resistor to VOSNS- to program oscillator frequency and FB, OCSET, BBFB, and VDAC bias currents
Remote Sense Input. Connect to ground at the Load.
Programs the hiccup over-current threshold through an external resistor tied to VDAC and an internal current
source.
Regulated voltage programmed by the VID inputs. Current Sensing and Over Current Protection are referenced
to this pin. Connect an external RC network to VOSNS- to program Dynamic VID slew rate.
Buffered IIN signal. Connect an external RC network to FB to program converter output impedance
Inverting input to the Error Amplifier. Converter output voltage is offset from the VDAC voltage through an
external resistor connected to the converter output voltage at the load and an internal current source. Bias
current is a function of ROSC. Also OVPsense.
Output of the Error Amplifier
Controls Converter Softstart, Power Good, and Over-Current Timing. Connect an external capacitor to LGND to
program the timing.
Compen
sation for the Current Share control loop. Connect a capacitor to ground to set the control loop’s
bandwidth. Phase 2 is forced to match phase 1’s current.
No Connect.
Local Ground and IC substrate connection
External resistor to ground sets voltage at BIASOUT pin. Bias current is a function of ROSC.
Power for internal circuitry and source for BIASOUT regulator
No Connect.
150mA open-looped regulated voltage set by SETBIAS for GATE drive bias.
Open Collector output that drives low during Softstart or any fault condition. Connect external pull-up.
Non-inverting input to the Phase 2 Current Sense Amplifier.
No Connect.
Ground Selects VR10 VID, Float Selects OPTERON VID, VCC Selects ATHLON VID
No Connect.
Power for Phase 2 High-Side Gate Driver
Phase 2 High-Side Gate Driver Output and input to GATEL2 non-overlap comparator.
Return for Phase 2 Gate Drivers
Phase 2 Low-Side Gate Driver Output and input to GATEH2 non-overlap comparator.
Can be used to monitor the driver supply voltage or 5V supply voltage when converting from 5V. An under
voltage condition initiates Soft Start.
Power for Phase 1 and 2 Low-Side Gate Drivers.
Phase 1 Low-Side Gate Driver Output and input to GATEH1 non-overlap comparator.
Return for Phase 1 Gate Drivers
Phase 1 High-Side Gate Driver Output and input to GATEL1 non-overlap comparator.
Power for Phase 1 High-Side Gate Driver
Not connected
Inverting input to the Phase 1Current Sense Amplifier.
Non-inverting input to the Current Sense Amplifier.
Output that drives high during an Over-Voltage condition.
Enable Input. A logic low applied to this pin puts the IC into Fault mode.
No Connect.
Inputs to VID D to A Converter
Inputs to VID D to A Converter
Inputs to VID D to A Converter
Inputs to VID D to A Converter
5
OCSET
6
VDAC
7
VDRP
8
FB
9
EAOUT
10
SS/DEL
11
SCOMP
12
13
14
15
16-17
18
19
20
21
22
23-27
28
29
30
31
N/C
LGND
SETBIAS
VCC
N/C
BIASOUT
PWRGD
CSINP2
N/C
VID_SEL
N/C
VCCH2
GATEH2
PGND2
GATEL2
32
5VUVL
33
34
35
36
37
38
39
40
41
42
43-44
45
46
47
48
VCCL
GATEL1
PGND1
GATEH1
VCCH1
NC
CSINM1
CSINP1
OVP
ENABLE
N/C
VID5
VID0
VID1
VID2
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| IR3092MTRPBF | 功能描述:IC CONTROLLER 2PHASE 48-MLPQ RoHS:是 类别:集成电路 (IC) >> PMIC - 电源控制器，监视器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 应用:多相控制器 输入电压:- 电源电压:9 V ~ 14 V 电流 - 电源:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（5x5） 包装:带卷 (TR) |
| IR3093M | 制造商:IRF 制造商全称:International Rectifier 功能描述:3 PHASE OPTERON, ATHLON, OR VR10.X CONTROL IC |
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