参数资料
| 型号： | IR3507MTRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 12/19页 |
| 文件大小： | 0K |
| 描述： | IC XPHASE3 CONTROL 20-MLPQ |
| 标准包装： | 1 |
| 系列： | XPhase3™ |
| 应用： | 处理器 |
| 电流 - 电源： | 4mA |
| 电源电压： | 8 V ~ 28 V |
| 工作温度： | 0°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-MLPQ |
| 供应商设备封装： | 20-MLPQ（4x4） |
| 包装： | 标准包装 |
| 产品目录页面： | 1383 (CN2011-ZH PDF) |
| 其它名称： | IR3507MTRPBFDKR |
NOT RECOMMENDED FOR NEW DESIGNS
REPLACEMENT PRODUCT – IR3507ZPBF
IR3507PbF
A synchronous rectification disable comparator is used to detect converter CSIN- pin voltage, which represents
local converter output voltage. If the voltage is below 75% of VDAC and negative current is detected, GATEL drives
low, which disables synchronous rectification and eliminates negative current during power-up.
The gate drivers pull low if the supply voltages are below the normal operating range. An 80k ? resistor is connected
across the GATEH/GATEL and PGND pins to prevent the GATEH/GATEL voltage from rising due to leakage or
other causes under these conditions.
PWM Ramp
Every time the phase IC is powered up PWM ramp magnitude is calibrated to generate a 52.5 mV/% ramp for a
VCC=12V. For example, for a 15 % duty ratio the ramp amplitude is 750mV for VCC=12V. Feed-forward control
is achieved by varying the PWM ramp proportionally with VCC voltage after calibration.
In response to a load step-up the error amplifier can demand 100 % duty cycle. In order to avoid pulse skipping
under this scenario and allow the BOOST cap to replenish, a minimum off time is allowed in this mode of
operation. As shown in Figure 6, 100 % duty is detected by comparing the PWM latch output (PWMQ) and its
input clock (PWM_CLK). If the PWMQ is high when the PWM_CLK is asserted the TopFET turnoff is initiated.
The TopFET is again turned on once the RMPOUT drops within 200 mV of the VDAC.
CLKIN
PHSIN
(2 Phase Design)
NORMAL OPERATION
EAIN
100 % DUTY OPERATION
RMPOUT
PWMQ
VDAC
80ns
VDAC+200mV
Figure 6: PWM Operation during normal and 100 % duty mode.
Power State Indicator (PSI) function
From a system perspective, the PSI input is controlled by the system and is forced low when the load current is
lower than a preset limit and forced high when load current is higher than the preset limit. IR3507 can accept an
active low signal on its PSI input and force the drivers into tri-state, effectively forcing the phase IC into off state.
As shown in Figure 7, once the PSI assert signal is received the IC waits for eight PHSIN pulses before forcing
the drivers into tri-state. This delay is required to prevent the IC from responding to any high frequency PSI input.
The de-assertion of the PSI input is succeeded by an increase in the load current. In order to prevent excess
discharging of the output capacitors and reduction in the circulating sinking current between phases, the IC
makes sure that the topFET is turned on first during de-assertion. This is achieved with the help of an Anti-Bias TM
circuitry. Irrespective of the PSI input, the IOUT bus remains connected to current share bus of the system. The
PSI circuit is disabled during power up while the output voltage is below 0.75*VDAC. The maximum PSI de-assert
delay is determined by the CLKIN period.
Page 12 of 19
IR Confidential
April 2, 2009
相关PDF资料 |
PDF描述 |
|---|---|
| IR3507ZMTRPBF | IC CTRL XPHASE3 20-MLPQ |
| IR3508MTRPBF | IC XPHASE3 CTLR 20-MLPQ |
| IR3508ZMTRPBF | IC CTRL XPHASE3 20MLPQ |
| IR3510MPBF | IC XPHASE CONTROL 32-MLPQ |
| IR3513ZMTRPBF | IC CTRL XPHASE3 POL 32-MLPQ |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IR3507PBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM PHASE IC |
| IR3507Z | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM PHASE IC |
| IR3507ZMPBF | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM PHASE IC |
| IR3507ZMTRPBF | 功能描述:开关变换器、稳压器与控制器 XPHASE3 DDR VTT 7V 2A 3 Wire RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel |
| IR3508 | 制造商:IRF 制造商全称:International Rectifier 功能描述:XPHASE3TM PHASE IC |
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