参数资料
型号: IR3629
厂商: International Rectifier
英文描述: HIGH FREQUENCY SYNCHRONOUS PWM BUCK CONTROLLER WITH POWER GOOD OUTPUT
中文描述: 高频同步PWM降压控制器与电源良好输出
文件页数: 9/23页
文件大小: 598K
代理商: IR3629
IR3629/IR3629A MPbF
11/26/2007
Programming the Current-Limit
The Current-Limit threshold can be set by
connecting a resistor (R
SET) from the drain of the
low-side MOSFET to the OCSet pin. The
resistor can be calculated by using equation (3).
The
R
DS(on)
has
a
positive
temperature
coefficient and it should be considered for the
worst case operation. This resistor must be
placed close to the IC, place a small ceramic
capacitor from this pin to ground for noise
rejection purposes.
Layout Consideration
The layout is very important when designing high
frequency switching converters. Poor layout will
affect noise pickup and can cause a good design
to perform with less than expected results.
Start to place the power components, making all
the connection in the top layer with wide, copper
filled areas. The inductor, output capacitors and
the MOSFETS should be as close to each other
as possible. This helps to reduce the EMI
radiated by the power traces due to the high
switching currents through them. Place input
capacitor very close to the drain of the high-side
MOSFET, to reduce the ESR replace the single
input capacitor with two parallel units.
The feedback part of the system should be kept
away from the inductor and other noise sources.
The critical
bypass components such as
capacitors for Vcc and Vc should be close to the
respective pins. It is important to place the
feedback
components
including
feedback
resistors and compensation components close to
Fb and Comp pins.
In a multilayer PCB use one layer as a power
ground plane and have a control circuit ground
(analog ground), to which all signals are
referenced. The goal is to localize the high
current path to a separate loop that does not
interfere with the more sensitive analog control
function. These two grounds must be connected
together on the PC board layout at a single point.
The MLPD is a thermally enhanced package.
Based
on
thermal
performance
it
is
recommended
to
use
4-layers
PCB.
To
effectively remove heat from the device the
exposed pad should be connected to ground
plane using vias.
Setting the Power Good Threshold
Power Good threshold can be programmed by
using two external resistors (R1, R2 in figure 16).
The following formulas can be used to set the
threshold:
Where;
0.38V is reference of the internal comparator
0.9*Vout is selectable threshold for power good,
for this design it is 1.35V.
Select R
1=10KOhm
Using (18): R
2=3.91KOhm
Select R
2=3.92K
Use a pull up resistor (4.99K) from PGood pin to
Vcc.
)
--(
*R
V
.
*V
.
V
.
R
out
18
38
0
9
0
38
0
1
2
=
17
K
23
.
5
R
Select
K
13
.
5
R
current)
output
nominal
over
(50%
A
18
5
.
1
A
12
I
m
7
.
5
.
1
m
8
.
3
R
7
OCSet
)
LIM
(
o
SET
)
on
(
DS
=
*
)
--(
R
I
R
I
)
on
(
DS
OCSet
)
critical
(
L
SET
3
=
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