参数资料
型号: IR3637ASPBF
厂商: International Rectifier
文件页数: 8/19页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 8-SOIC
标准包装: 95
PWM 型: 电压模式
输出数: 1
频率 - 最大: 660kHz
占空比: 76%
电源电压: 4.5 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 管件
配用: IRPP3637-12A-ND - KIT REF DES 12A 1PH SYNC BUCK
IRDC3637-ND - BOARD EVAL SYNC BUCK REGULATOR
IR3637ASPbF
For this design, IRF8910 is a good choice. The device
provides two N-MOSFETs in a compact SOIC 8-Pin pack-
These values are taken under a certain condition test.
For more detail please refer to the IRF8915 data sheet.
age.
By using equation (6), we can calculate the switching
The IRF8910 has the following data:
V DSS = 20V
I D = 10A
R DS(ON) =18.3 ? @ V GS =4.5V (Lower FET)
R DS(ON) =13.4 ? @ V GS =10V (Upper FET)
The total conduction losses will be:
P CON(TOTAL) =P CON (Upper Switch)+P CON (Lower Switch)
? = 1.4 according to the IRF8910 data sheet for
150 C junction temperature
P CON(TOTAL) =0.83W
The switching loss is more difficult to calculate, even
though the switching transition is well understood. The
reason is the effect of the parasitic components and
losses.
P SW = 0.127mW
Feedback Compensation
The IR3637A is a voltage mode controller; the control
loop is a single voltage feedback path including error
amplifier and error comparator. To achieve fast transient
response and accurate output regulation, a compensa-
tion circuit is necessary. The goal of the compensation
network is to provide a closed loop transfer function with
the highest 0dB crossing frequency and adequate phase
margin (greater than 45 ).
The output LC filter introduces a double pole, –40dB/
decade gain slope above its corner resonant frequency,
and a total phase lag of 180 (see Figure 8). The Reso-
nant frequency of the LC filter expressed as follows:
switching times during the switching procedures such
as turn-on / turnoff delays and rise and fall times. The
control MOSFET contributes to the majority of the switch-
F LC =
2 π×
1
L O × C O
---(7)
ing losses in synchronous Buck converter. The synchro-
nous MOSFET turns on under zero voltage conditions,
therefore, the turn on losses for synchronous MOSFET
can be neglected. With a linear approximation, the total
switching loss can be expressed as:
Figure 8 shows gain and phase of the LC filter. Since we
already have 180 phase shift just from the output filter,
the system risks being unstable.
t r + t f × I LOAD
P SW =
---(6)
V DS(OFF)
2
×
T
Where:
V DS(OFF) = Drain to Source Voltage at off time
Gain
0dB
-40dB/decade
Phase
0
t r = Rise Time
t f = Fall Time
T = Switching Period
I LOAD = Load Current
F LC Frequency
-180
F LC
Frequency
The switching time waveform is shown in figure 7.
V DS
90%
10%
V GS
Figure 8 - Gain and phase of LC filter.
The IIR3637A’s error amplifier is a differential-input
transconductance amplifier. The output is available for
DC gain control or AC phase compensation.
The E/A can be compensated with or without the use of
local feedback. When operated without local feedback
the transconductance properties of the E/A become evi-
dent and can be used to cancel one of the output filter
t d (ON)
t r
t d (OFF)
t f
poles. This will be accomplished with a series RC circuit
from Comp pin to ground as shown in Figure 9.
Figure 7 - Switching time waveforms.
From IRF8910 data sheet:
8
t r = 10ns
t f = 4.1ns
www.irf.com
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