参数资料
型号: IR3802AMTRPBF
厂商: International Rectifier
文件页数: 13/21页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 6A 15QFN
产品培训模块: SupIRBuck? Family and POL Design Tools Overview
标准包装: 1
系列: SupIRBuck™
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 12 V
输入电压: 2.5 V ~ 21 V
PWM 型: 电压模式
频率 - 开关: 300kHz
电流 - 输出: 6A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 15-PowerVQFN
包装: 标准包装
供应商设备封装: PQFN(5x6)
产品目录页面: 1384 (CN2011-ZH PDF)
其它名称: IR3802AMTRPBFDKR
PD-60357
IR3802AMPbF
Feedback Compensation
The IR3802A is a voltage mode controller; the
The ESR zero of the output capacitor expressed
as follows:
control loop is a single voltage feedback path
including error amplifier and error comparator. To
achieve fast transient response and accurate
V OUT
F ESR =
1
2 ? π * ESR * C o
- - - (12)
output regulation, a compensation circuit is
necessary. The goal of the compensation
network is to provide a closed loop transfer
function with the highest 0dB crossing frequency
and adequate phase margin (greater than 45 o ).
The output LC filter introduces a double pole, –
R 8
R 9
F b
V REF
E/A
Comp
C 4
R 3
Ve
C POLE
40dB/decade gain slope above its corner
resonant frequency, and a total phase lag of 180 o
(see figure 13). The resonant frequency of the LC
filter expressed as follows:
Gain(dB)
H(s) dB
F LC =
1
2 π L o C o
- - - (11)
F Z
Frequency
Figure 13 shows gain and phase of the LC filter.
Since we already have 180 o phase shift from the
output filter alone, the system risks being
unstable.
Fig. 14: TypeII compensation network
and its asymptotic gain plot
The transfer function (Ve/Vo) is given by:
Gain
0dB
Phase
0
H ( s ) = g m *
R 9
R 9 + R 8
*
1 + sR 3 C 4
sC 4
- - - (13)
-40dB/decade
The (s) indicates that the transfer function varies
as a function of frequency. This configuration
introduces a gain and zero, expressed by:
[ H ( s ) ] = ? ? ? g
? * R 3 - - - (14)
R 9 + R 8 ? ?
F z =
- - - (15)
-180
F LC Frequency F LC Frequency
Fig. 13: Gain and Phase of LC filter
The IR3802A’s error amplifier is a differential-
input transconductance amplifier. The output is
available for DC gain control or AC phase
compensation.
The error amplifier can be compensated either in
type II or typeIII compensation. When it is used in
type II compensation the transconductance
R 9 ?
m *
?
1
2 π * R 3 * C 4
The gain is determined by the voltage divider and
error amplifier’s transconductance gain.
First select the desired zero-crossover frequency
(Fo):
F o > F ESR and F o ≤ ( 1/5 ~ 1/10 ) * F s
Use the following equation to calculate R4:
properties of the error amplifier become evident
and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC
R 3 =
V osc * F o * F ESR * ( R 8 + R 9 )
V in * F LC 2 * R 9 * g m
- - - (16)
circuit from Comp pin to ground as shown in
figure 14.
This method requires that the output capacitor
should have enough ESR to satisfy stability
requirements. In general the output capacitor’s
ESR generates a zero typically at 5kHz to 50kHz
which is essential for an acceptable phase
margin.
11/04/08
Where:
V in = Maximum Input Voltage
V osc = Oscillator Ramp Voltage
F o = Crossover Frequency
F ESR = Zero Frequency of the Output Capacitor
F LC = Resonant Frequency of the Output Filter
R 8 and R 9 = Feedback Resistor Dividers
g m = Error Amplifier Transconductance
13
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