参数资料
型号: IRAMS12UP60A
厂商: International Rectifier
文件页数: 4/17页
文件大小: 0K
描述: IC MOSFET DRIVER
标准包装: 80
系列: *
IRAMS12UP60A
Inverter Section Switching Characteristics
V BIAS (V CC , V BS1,2,3 )=15V, T J =25 o C, unless otherwise specified.
Symbol
E ON
Parameter
Turn-On Switching Loss
Min
---
Typ
270
Max
400
Units Conditions
I C =6A, V + =400V
E OFF
E TOT
E REC
t RR
E ON
E OFF
E TOT
E REC
t RR
Q G
Turn-Off Switching Loss
Total Switching Loss
Diode Reverse Recovery energy
Diode Reverse Recovery time
Turn-on Switching Loss
Turn-off Switching Loss
Total Switching Loss
Diode Reverse Recovery energy
Diode Reverse Recovery time
Turn-On IGBT Gate Charge
---
---
---
---
---
---
---
---
---
---
55
325
10
100
390
110
500
35
140
19
85
485
20
---
---
---
---
---
---
29
μJ
ns
μJ
ns
nC
V CC =15V, L=1.2mH
Energy losses include "tail" and
diode reverse recovery
See CT1
I C =6A, V + =400V
V CC =15V, L=1.2mH, T J =150°C
Energy losses include "tail" and
diode reverse recovery
See CT1
I C =8A, V + =400V, V GE =15V
T J =150°C, I C =6A, V P =600V
RBSOA
Reverse Bias Safe Operating Area
FULL SQUARE
V + = 450V,
V CC =+15V to 0V
See CT3
SCSOA
Short Circuit Safe Operating Area
5
---
---
μs
T J =25°C, V + = 400V,
V GE =+15V to 0V
Recommended Operating Conditions Driver Function
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltages are absolute referenced to COM. The V S offset is tested with all supplies biased at
15V differential (Note 3)
Symbol
V B1,2,3
V S1,2,3
V CC
V T/ITRIP
V IN
HIN
Deadtime
Definition
High side floating supply voltage
High side floating supply offset voltage
Low side and logic fixed supply voltage
T/I TRIP input voltage
Logic input voltage LIN, HIN
High side PWM pulse width
External dead time between HIN and LIN
Min
V S +12.5
Note 4
13.5
V SS
V SS
1
1
Typ
V S +15
---
15
---
---
---
---
Max
V S +17.5
450
16.5
V SS +5
V SS +5
---
---
Units
V
V
V
V
V
μs
μs
Note 3: For more details, see IR21365 data sheet
Note 4: Logic operational for V s from COM-5V to COM+600V. Logic state held for V s from COM-5V to COM-V BS .
(please refer to DT97-3 for more details)
4
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