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参数资料
| 型号： | IRDC3065 |
| 厂商： | International Rectifier |
| 文件页数： | 12/15页 |
| 文件大小： | 0K |
| 描述： | LOW PWR SWTCH REG REF DESIGN KIT |
| 标准包装： | 1 |
| 主要目的： | DC/DC，负反相器 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | -5V |
| 电流 - 输出： | 200mA |
| 输入电压： | 4 ~ 7 V |
| 稳压器拓扑结构： | 反相 |
| 频率 - 开关： | 1.2MHz |
| 板类型： | 完全填充 |
| 已供物品： | 板，软件 |
| 已用 IC / 零件： | IRU3065 |
| 产品目录页面： | 1383 (CN2011-ZH PDF) |
| 相关产品： | IRU3065CLCT-ND - IC REG CTRLR INV PWM SOT23-6 IRU3065CLTR-ND - IC REG CTRLR INV PWM SOT23-6 |
| 其它名称： | *IRDC3065 |
IRU3065(PbF)
Analysis of Operation
Regulation Mode
From Figure 18, when the PMOS is on, the inductor
current increases from zero. That is:
The expected switching frequency linearly increases
as output current goes up, as shown in Figure 20.
Power Limit Mode
I L =
V IN
L
× t
---(4)
When output current continuously increases and
I OUT =I OCP , the converter is in the boundary of regulation
mode and power limit mode with output voltage is regu-
And the peak current is given by:
lated to nominal voltage V OUT =V OUT(NOM) . As current con-
I PEAK =
V IN
L
× t ON
---(5)
tinues to increase (I OUT >I OCP ), the converter goes into
power limit mode. In this mode, the maximum inductor
current is limited by the internal current reference
R S × I PEAK = R S ×
× t ON = VI SEN =150mV ---(6)
VI SEN(TH)
R S
L × I PEAK VI SEN × L
-(V OUT - V D )
-(V OUT - V D ) × R S
Where t ON is the turn on time of the PMOS.
Because the switch is turned off when sensed inductor
current reaches threshold VI SEN , the following equation
holds:
V IN
L
I PEAK =
The turn on time of the PMOS can be calculated as:
VI SEN =145mV. Therefore, the turn on time of the P MOS
keeps same as equation (7).
For turn off time, the inductor current theorectically
should decrease from I PEAK to zero if the threshold
voltage is close to zero , therefore:
t 1 = = ---(12)
L × I PEAK
V IN
t ON
= =
VI SEN × L
R S × V IN
---(7)
Where V D is the forward voltage drop of output di-
ode D2.
For inductor, by applying voltage and second balance
The switching period is given by:
approach, we have:
V IN × t ON +(V OUT - V D ) × t 1 = 0
T S = t ON + t 1 =
L × I PEAK
V IN
+
L × I PEAK
-(V OUT - V D )
T S = L × I PEAK ×
---(13)
It can be derived as:
V IN × t ON
t 1 = -(V OUT - V D ) =
VI SEN × L
-(V OUT - V D ) × R S
---(8)
V IN - V OUT + V D
-V IN × ( VOUT - V D )
The combination of equations (12) and (13) result in
Where V D is the forward voltage drop of output di-
the following:
ode D2.
From Figure 18, the average current of output diode
t 1
T S
=
V IN
V IN - V OUT + V D
---(14)
should equals the output current, resulting in:
The output current equals the average diode current,
I D(AVG) =
× I PEAK ×
= I OUT
---(9)
Where T S is the switching period and f S =
× I PEAK ×
R S
V IN - V OUT + V D
1 t 1
2 T S
1
T S
Combination of equation (6)(8)(9) results in the rela-
which is:
I OUT =
I OUT =
1
2
1
2
VI SEN V IN
× ×
t 1
T S
---(15)
tionship between output current and switching frequency:
f S =
-R S2 × (V OUT - V D )
VI SEN × VI SEN × L
× I OUT × 2
---(10)
Where the peak current is given by equation (6).
Equation (15) can be rewritten as:
Because at regulation mode, the output voltage is regu-
lated, i.e. V OUT =V OUT(NOM) . Then the equation (10) can
be rewritten as:
V OUT = V IN + V D -
V I SEN × V IN
2R S × I OUT
---(16)
f S =
-R S2 × (V OUT(NOM) - V D )
VI SEN × VI SEN × L
× I OUT × 2
---(11)
The above equation shows that the output voltage at the
power limit mode is not regulated. It decreases as the
output current increases.
12
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