参数资料
型号: IRDCIP2001-C
厂商: International Rectifier
文件页数: 1/10页
文件大小: 0K
描述: IC CONVRTR 4PH BUCK 80A W/IP2001
标准包装: 1
系列: iPOWIR™
主要目的: DC/DC,步降
输出及类型: 1,非隔离
功率 - 输出: 136W
输出电压: 1.7V
电流 - 输出: 80A
输入电压: 5 ~ 12 V
稳压器拓扑结构: 降压
频率 - 开关: 500kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: iP2001
其它名称: *IRDCIP2001-C
PD - 94089F
iP2001
Synchronous Buck
Multiphase Optimized BGA Power Block
Integrated Power Semiconductors, Drivers & Passives
Features:
?
20A continuous output current with no derating
?
?
?
?
up to T PCB = 90°C
Very small 11mm x 11mm x 3mm profile
Internal features minimize layout sensitivity *
Optimized for very low power losses
3.3 to 12V input voltage
iP2001 Power Block
Description
The iP2001 is a fully optimized solution for high current synchronous buck multiphase applications.
Board space and design time are greatly reduced because most of the components required for each
phase of a typical discrete-based multiphase circuit are integrated into a single 11mm x 11mm x 3mm
BGA power block. The only additional components required for a complete multiphase converter are a PWM
IC, the external inductors, and the input and output capacitors.
iPOWIR technology offers designers an innovative board space saving solution for applications
requiring high power densities. iPOWIR technology eases design for applications where component
integration offers benefits in performance and functionality. iPOWIR technology solutions are also optimized
internally for layout, heat transfer and component selection.
iP2001 Internal Block Diagram
V IN
PRDY
ENABLE
MOSFET
PWM
Driver with
dead time
V SW
V DD
SGND
control
PGND
* All of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR Block. There are no concerns about double pulsing,
unwanted shutdown, or other malfunctions which often occur in switching power supplies. The iPOWIR Block will function normally without any additional input power
supply bypass capacitors. However, for reliable long term operation it is recommended that the adequate amount of input decoupling is provided on the V IN pin. No
additional bypassing is required on the V DD pin.
www.irf.com
03/10/03
1
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