参数资料
型号: IRMCS2031
厂商: International Rectifier
英文描述: Complete Sensorless Drive Design Platform iMOTION Development System
中文描述: 完整的无传感器的驱动设计平台iMotion的开发系统
文件页数: 15/18页
文件大小: 193K
代理商: IRMCS2031
IRMCS2031
Parallel Interface Port
IRMCS2031 provides a 8bit parallel interface port to facilitate microprocessor interface. Interface is generic and be
able to interface most common 8bit parallel interface such as MCS8051, some Motorola 8bit uP, MicroChp,etc. Figure
9 shows the connection diagram. The connector, J5, is an 2-by-10 header connector pins.
Each signal is 3.3V level and data bus is multiplexed. Table 1 summarizes each signal definition.
NA
HP_nCS
HP_nWE
HP_Data7
HP_nOE
HP_A
NA
HP_Data5
HP_Data6
HP_Data0
HP_Data1
NA
NA
HP_Data3
HP_Data4
HP_Data2
J5
HDR2X10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
P
+3.3V_BB
Figure 7 Parallel Interface Port
Signal
HP_nCS
HP_nOE
HP_nWE
HP_A
HP_Data
I/O
1
I
I
I
I
I/O
Description
Active low Host Port Chip Select
Active Low Host Port Output Enable
Active low Host Port Write Enable
Host Port Register Address. 1 = Address register, 0 = Data Register
Bidirectional Host Port data bus
Table 2. Microprocessor Interface Module Signal Definitions
Figures 10 and 11 show detailed timing requirements for register read and write operations depending on
the type of microprocessor (Intel or Motorola type). All values are in nanoseconds. The data bus output is
activated by the logical combination (!nCS && !nOE && new), which allows read and write operations to be
either nWe/nOE (Intel) or nCS (Motorola) driven. Figures 4 and 5 show example connections for Intel 8051
and Motorola 64K/Coldfire microprocessors.
Row
1
2
3
4
5
6
7
HP_nCS or HP_nOE (whichever occurs last) to Data invalid/Hi-
Name
Min
10
0
60
60
Max
Comment
HP_A to HPnCS or HP_nWE (which ever occurs last) low setup time
HP_D to HPnCS or HP_nWE (which ever occurs last) low setup time
Minimum pulswidth for nCS and nWE
Minimum data hold time from HP_nWE or HPnCS (whichever occurs last) low
Minimum address hold time from HP_nWE or HPnCS (whichever occurs last) low
HP_nCS or HP_nOE (whichever occurs last) to Data access time
C
TsuADDR
C
TsuData
C
Tpw_nCSnWE
C
ThData
C
ThAddr
D
Tacc
D
ThData
0
0
35
35
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
15
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