参数资料
| 型号： | IRMCS2033 |
| 厂商： | International Rectifier |
| 文件页数： | 17/21页 |
| 文件大小： | 0K |
| 描述： | DESIGN BOARD FOR IRMCK203 |
| 标准包装： | 1 |
| 系列： | iMOTION™ |
| 主要目的： | 电源管理，电机控制 |
| 已用 IC / 零件： | IRMCK203 |
| 已供物品： | 板，文档 |
| 相关产品： | IRMCK203-ND - IC MOTION CONTROL AC HP 80QFP |
| 其它名称： | *IRMCS2033 |
IRMCS2033
Parallel Interface Port
IRMCS2033 provides an 8-bit parallel interface port to facilitate microprocessor interface. The interface is generic and
compatible with most common 8-bit parallel interfaces such as MCS8051, some Motorola 8-bit uP, Microchip, etc.
VCC
J5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
HP_D0
HP_D1
HP_D2
HP_D3
HP_D4
HP_D5
HP_D6
HP_D7
NA
NA
NA
NA
HP_nCS
HP_nWE
HP_nOE
HP_A
HEADER 20
Figure 8. Parallel Interface Port
Each signal is 3.3V level and the data bus is multiplexed. Table 1 summarizes each signal definition.
Signal
HP_nCS
HP_nOE
HP_nWE
HP_A
HP_D n
I/O 1
I
I
I
I
I/O
Table 1.
Description
Active low Host Port Chip Select
Active Low Host Port Output Enable
Active low Host Port Write Enable
Host Port Register Address. 1 = Address register, 0 = Data Register
Bidirectional Host Port data bus, where n = data bit 0 - 7
Microprocessor Interface Module Signal Definitions
The IRMCK203 contains an address register that is updated with the Host Register address when HP_A = 1. After
each subsequent data byte is either read or written, the internal address register is incremented. The diagram below
shows that Data Bytes 0 to N would access register locations initially specified by the Address Byte. The Address
Byte with the HP_A signal can be asserted at any time.
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
16
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