参数资料
| 型号： | IRPLMB1E |
| 厂商： | International Rectifier |
| 文件页数： | 6/13页 |
| 文件大小： | 0K |
| 描述： | KIT DESIGN BALLAST 220VAC |
| 标准包装： | 1 |
| 其它名称： | *IRPLMB1E |
IRPLMB1E
Figure 6.3 shows the VS (HB) Voltage, the lamp
voltage and the lamp current during Run Mode.
Figure 6.3:
VS (HB) Voltage (blue), Lamp Voltage (yellow) and the
Lamp Current (green) during Run Mode.
7. Fault Conditions
In case of fault conditions such as open filaments,
failure to strike, deactivated lamp or no lamp, the
IR2520D will go into Fault Mode. In this mode the
oscillator is latched off. To reset the IC back to pre-
heat mode, VCC must be recycled below and above
the UVLO thresholds. Resetting the mains does this.
In case of low AC line, the IR2520D will automati-
cally increase the frequency to maintain ZVS. In this
way, the ballast will work at a lower power during a
low AC line condition and will operate at the proper
power again when the line increases again.
7.1. Failure To Strike/ Deactivated Lamp Protection
This protection relies on the crest factor protection
together with the non-ZVS circuit of the IR2520D, both
enabled when the voltage in pin VCO reaches 4.6V.
6
In order to detect failure to strike conditions, the
IR2520D performs an internal crest factor measure-
ment for detecting excessive dangerous currents or
inductor saturation that can occur during a lamp non-
strike fault condition or deactivated lamp condition.
The IR2520D measures the VS pin during the entire
on-time of the low-side MOSFET. Should the peak
current exceed the average current by a factor of 4
during the on-time of LO, the IC will enter Fault Mode
and both gate driver outputs will be latched ‘low’.
Performing the crest factor measurement provides
a relative current measurement that cancels tem-
perature and/or tolerance variations of the RDSon
of the low-side half-bridge MOSFET and does not
need to be programmed differently for different
lamp types. During normal operation, the current
will increase until the lamp ignites. After lamp ig-
nition the current will decrease down to the nomi-
nal current. Should a lamp non-strike condition
occur where the filaments are intact but the lamp
does not ignite, the lamp voltage and output stage
current will increase during the ignition ramp until
excessive currents occur or the resonant induc-
tor saturates. The non-ZVS circuit or the crest
factor circuit will detect this condition and the IC will
enter Fault Mode and both gate driver outputs will be
latched ‘low’. This will prevent damaging of the half-
bridge MOSFETs.
Fig. 7.1 shows the inductor current and the lamp
voltage in case of failure to strike condition together
with the VCO pin voltage. At initial turn-on of the bal-
last, the frequency will ramp down from fmax, through
resonance, to fmin. If the lamp does not ignite, the
inductor current will saturate and high-voltages will
occur across the lamp as the frequency sweeps
through resonance. The voltages and currents in the
output stage will decrease as the frequency contin-
ues to decrease to the capacitive side of resonance.
The voltages and currents will be low but hard-switch-
ing will occur (non-ZVS). When the frequency reaches
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