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参数资料
| 型号： | IRS21362D |
| 厂商： | International Rectifier |
| 英文描述： | 3-PHASE BRIDGE DRIVER |
| 中文描述： | 3相桥式驱动器 |
| 文件页数： | 4/23页 |
| 文件大小： | 609K |
| 代理商： | IRS21362D |
www.irf.com
4
IRS213(6,62,63,65,66,67,68)D(J&S)PbF
Static Electrical Characteristics - (Continued)
V
BIAS
(V
CC
,V
BS1,2,3
) = 15 V unless otherwise specified. The V
IN
, V
TH
, and I
IN
parameters are referenced to V
SS
and are
applicable to all six channels (HIN1,2,3/ HIN1,2,3 and LIN1,2,3). The V
O
and I
O
parameters are referenced to COM and
V
S1,2,3
and are applicable to the respective output leads: LO1,2,3 and HO1,2,3.
Symbol
Definition
Min. Typ. Max. Units
Test
Conditions
V
BSUV-
(6,68)
V
BS
supply undervoltage negative going
threshold
V
BS
supply undervoltage hysteresis
V
CC
supply undervoltage positive going
threshold
V
CC
supply undervoltage negative going
threshold
V
CC
supply undervoltage hysteresis
V
BS
supply undervoltage positive going
threshold
V
BS
supply undervoltage negative going
threshold
V
BS
supply undervoltage hysteresis
V
CC
supply undervoltage positive going
threshold
V
CC
supply undervoltage negative going
threshold
7.4
8.2
9
V
BSUVHY
(6,68)
0.3
0.7
—
V
CCUV+
(62)
9.6
10.4 11.2
V
CCUV-
(62)
8.6
9.4
10.2
V
CCUVHY
(62)
0.5
1
—
V
BSUV+
(62)
9.6
10.4 11.2
V
BSUV-
(62)
8.6
9.4
10.2
V
BSUVHY
(62)
V
CCUV+
(63,65,66,67)
V
CCUV-
(63,65,66,67)
V
CCUVHY
(63,65,66,67)
V
BSUV+
(63,65,66,67)
V
BSUV-
(63,65,66,67)
V
BSUVHY
(63,65,66,67)
I
LK
0.5
1
—
10.4
11.1 11.6
10.2
10.9 11.4
V
CC
supply undervoltage hysteresis
—
0.2
—
V
BS
supply undervoltage positive going
threshold
V
BS
supply undervoltage negative going
threshold
10.4
11.1 11.6
10.2
10.9 11.4
V
BS
supply undervoltage hysteresis
—
0.2
—
V
Offset supply leakage current
—
—
50
V
B
=V
S
= 600 V
I
QBS
Quiescent V
BS
supply current
—
70
120
μA
mA
V
I
QCC
Quiescent V
CC
supply current
Input clamp voltage (HIN, LIN, ITRIP and EN)
Input bias current (LOUT = HI)
Input bias current (LOUT = LO)
Input bias current (LOUT = HI)
Input bias current (LOUT = LO)
Input bias current (HOUT = HI)
Input bias current (HOUT = LO)
Input bias current (HOUT = HI)
Input bias current (HOUT = LO)
Input bias current (HOUT = HI)
Input bias current (HOUT = LO)
“High” ITRIP input bias current
“Low” ITRIP input bias current
“High” ENABLE input bias current
“Low” ENABLE input bias current
—
4.8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3
5.2
110
150
—
—
110
150
5
—
—
—
5
—
5
—
4
all inputs @
logic 0 value
V
IN,CLAMP
I
LIN+
(6,62,63,65)
I
LIN-
(6,62,63,65)
I
LIN+
(66,67,68)
I
LIN-
(66,67,68)
I
HIN+
(6,63,65)
I
HIN-
(6,63,65)
I
HIN+
(62)
I
HIN-
(62)
I
HIN+
(66,67,68)
I
HIN-
(66,67,68)
I
ITRIP+
I
ITRIP-
I
EN+
I
EN-
5.65
150
200
3
3
150
200
20
3
3
3
40
1
40
1
I
IN
=100 μA
V
IN
=4 V
V
IN
=0 V
V
IN
=4 V
V
IN
=0 V
V
IN
=4 V
V
IN
=0 V
V
IN
=4 V
V
IN
=0 V
V
IN
=4 V
V
IN
=0 V
V
IN
=4 V
V
IN
=0 V
V
IN
=4 V
V
IN
=0 V
μA
PRELIMINARY
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