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| 型号： | IRS2453DSTRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 13/18页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER FULL SELF OSC 14-SOIC |
| 标准包装： | 1 |
| 配置： | 高端和低端，同步 |
| 输入类型： | 自振荡 |
| 电流 - 峰： | 180mA |
| 配置数： | 1 |
| 输出数： | 4 |
| 高端电压 - 最大（自引导启动）： | 600V |
| 电源电压： | 10 V ~ 16.6 V |
| 工作温度： | -25°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 14-SOIC（窄型） |
| 包装： | 标准包装 |
| 产品目录页面： | 1382 (CN2011-ZH PDF) |
| 其它名称： | IRS2453DSTRPBFDKR |
IRS2453(1)D(S)
Functional Description
Under-Voltage Lock-Out Mode (UVLO)
The under-voltage lockout mode (UVLO) is defined as the state the IC is in when V CC is below the turn-on
threshold of the IC. The IRS2453(1)D under-voltage lock-out is designed to maintain an ultra low supply current of
e the high and low side output drivers are
activated. During under-voltage lock-out mode, the high and low side driver outputs LO1, LO2, HO1, HO2 are all
low. With V CC above the V CCUV+ threshold, the IC turns on and the output begin to oscillate.
Normal Operating Mode
Once V CC reaches the start-up threshold V CCUV+ , the MOSFET M1 opens, RT increases to approximately V CC
(V CC -V RT+ ) and the external CT capacitor starts charging. Once the CT voltage reaches V CT- (about 1/3 of V CC ),
established by an internal resistor ladder, LO1 and HO2 turn on with a delay equivalent to the dead time (t d ).
Once the CT voltage reaches V CT+ (approximately 2/3 of V CC ), LO1 and HO2 go low, RT goes down to
approximately ground (V RT- ), the CT capacitor starts discharging and the dead time circuit is activated. At the end
of the dead time, LO2 and HO1 go high. Once the CT voltage reaches V CT- , LO2 and HO1 go low, RT goes to
high again, the dead time is activated. At the end of the dead time, LO1 and HO2 go high and the cycle starts
over again.
The frequency is best determined by the graph, Frequency vs. RT, page 3, for different values of CT. A first order
approximate of the oscillator frequency can also be calculated by the following formula:
f ?
1
1 . 453 ? RT ? CT
This equation can vary slightly from actual measurements due to internal comparator over- and under-shoot
delays.
Bootstrap MOSFET
The internal bootstrap FET and supply capacitor (C BOOT ) comprise the supply voltage for the high side driver
circuitry. The internal bootstrap FET only turns on when the corresponding LO is high. To guarantee that the high-
side supply is charged up before the first pulse on HO1 and HO2, LO1 and LO2 outputs are both high when CT
ramps between zero and 1/3*V CC . LO1 and LO2 are also high when CT is grounded below 1/6*V CC to ensure that
the bootstrap capacitor is charged when CT is brought back over 1/3*V CC .
Non-Latched Shutdown
If CT is pulled down below VCTSD (approximately 1/6 of V CC ) by an external circuit, CT is not able to charge up
and oscillation stops. HO1 and HO2 outputs are held low. LO1 and LO2 outputs remain high while VCT remains
below V CT- enabling the bootstrap capacitors to charge. This state remains until the CT input is released and
oscillation can resume.
Latched Shutdown
When the SD pin is brought above 2 V, the IC goes into fault mode and all outputs are low. V CC has to be recycled
below V CCUV- to restart. The SD pin can be used for over-current or over-voltage protection using appropriate
external circuitry.
13
www.irf.com
? 2012 International Rectifier
November 28, 2012
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