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参数资料
| 型号： | IRU1015CT |
| 厂商： | International Rectifier |
| 文件页数： | 6/11页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 1.5A TO-220 |
| 标准包装： | 50 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 2.5 V ~ 3.3 V |
| 输入电压： | 最高 7V |
| 电压 - 压降（标准）： | 1.1V @ 1.5A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 1.5A |
| 电流 - 限制（最小）： | 1.6A |
| 工作温度： | 0°C ~ 150°C |
| 安装类型： | 通孔 |
| 封装/外壳： | TO-220-3 |
| 供应商设备封装： | TO-220AB |
| 包装： | 管件 |
| 其它名称： | *IRU1015CT IRU1015-CT IRU1015-CT-ND |
IRU1015
V
ESR
2) With the output capacitance being 1500 m F:
D t 3 D I 2 3 1.2
V ESL
T
V C
D Vc =
Where:
= = 1.6mV
C 1500
D t = 2 m s is the regulator response time
LOAD
1015plt1-1.0
CURRENT
To set the output voltage, we need to select R1 and R2:
( V V -1 ) 3 R1 = ( 3.45 -1 ) 3 121 = 213 V
1.25
LOAD CURRENT RISE TIME
Figure 5 - Typical regulator response
to the fast load current step.
An example of a regulator design to meet the AMD speci-
fication for 486DX4-120MHz is given below.
Assume the specification for the processor as shown in
Table 1:
3) Assuming R1=121 V , 1%
OUT
R2 =
REF
Select R2 = 215 V , 1%
Selecting both R1 and R2 resistors to be 1% toler-
ance results in the least amount of error introduced
Type of
Processor
AMD 486DX4
V OUT
Nominal
3.45 V
I MAX
1.2 A
Max Allowed
Output Tolerance
± 150 mV
by the resistor dividers leaving a ≈ ±2.5% error bud-
get for the IRU1015 reference which is well within the
initial accuracy of the device.
Table 1 - GTL+ specification for Pentium Pro
The first step is to select the voltage step allowed in the
output due to the output capacitor’s ESR:
1) Assuming the regulator’s initial accuracy plus the re-
sistor divider tolerance is ≈ ±86mV (±2.5% of 3.45V
nominal), then the total step allowed for the ESR and
Finally, the input capacitor is selected as follows:
4) Assuming that the input voltage can drop 150mV be-
fore the main power supply responds, and that the
main power supply response time is ≈ 50ms, then
the minimum input capacitance for a 1.2A load step
is given by:
the ESL, is -64mV.
C IN =
1.2 3 50
0.15
= 400 m F
Assuming that the ESL drop is -10mV, the remaining
V DROP L Input voltage drop allowed in step 4
D I L Load current step
ESR step will be -54mV. Therefore the output ca-
pacitor ESR must be:
54
ESR [ = 45m V
1.2
The Sanyo MVGX series is a good choice to achieve
both price and performance goals. The 6MV1500GX,
1500 m F, 6.3V has an ESR of less than 36m V typi-
cal. Selecting a single capacitor achieves our design
The ESR should be less than:
(V IN - V OUT - D V - V DROP )
ESR =
D I
Where:
D V L Maximum regulator dropout voltage
goal.
ESR =
(5 - 3.45 - 1.2 - 0.15)
1.2
= 0.167 V
The next step is to calculate the drop due to the ca-
pacitance discharge and make sure that this drop in
voltage is less than the selected ESL drop in the
previous step.
Select a single 1500 m F the same type as the output
capacitors exceeds our requirements. Figure 6 shows
the completed schematic for our example.
6
www.irf.com
Rev. 1.3
08/20/02
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