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| 型号： | IRU1050CP |
| 厂商： | International Rectifier |
| 文件页数： | 4/12页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 5A 2-UTHINPAK |
| 标准包装： | 80 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 2.5 V ~ 3.3 V |
| 输入电压： | 最高 7V |
| 电压 - 压降（标准）： | 1.1V @ 5A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 5A |
| 电流 - 限制（最小）： | 5.1A |
| 工作温度： | 0°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 2-超薄封装 |
| 供应商设备封装： | 2-Ultra Thin-Pak |
| 包装： | 管件 |
| 其它名称： | *IRU1050CP IRU1050-CP IRU1050-CP-ND |
IRU1050
Output Voltage Setting
The IRU1050 can be programmed to any voltages in the
range of 1.25V to 5.5V with the addition of R1 and R2
external resistors according to the following formula:
regulator and the load is gained up by the factor of (1+R2/
R1), or the effective resistance will be R P(eff) =R P 3 (1+R2/
R1). It is important to note that for high current applica-
tions, this can represent a significant percentage of the
) +I 3 R2
Where:
V OUT = V REF 3 ( 1+
R2
R1
ADJ
overall load regulation and one must keep the path from
the regulator to the load as short as possible to mini-
mize this effect.
PARASITIC LINE
V REF = 1.25V Typically
I ADJ = 50 m A Typically
V IN
Vin
V OUT
RESISTANCE
R P
R1 and R2 as shown in Figure 3:
IRU1050
V I N
V IN
V OUT
V O U T
Adj
R1
R L
IRU1050
Adj
V REF
I ADJ = 50uA
R1
R2
R2
Figure 4 - Schematic showing connection
Figure 3 - Typical application of the IRU1050
for programming the output voltage.
Stability
for best load regulation.
The IRU1050 keeps a constant 1.25V between the out-
put pin and the adjust pin. By placing a resistor R1 across
these two pins a constant current flows through R1, add-
ing to the I ADJ current and into the R2 resistor producing
a voltage equal to the (1.25/R1) 3 R2 + I ADJ 3 R2 which
will be added to the 1.25V to set the output voltage.
This is summarized in the above equation. Since the
minimum load current requirement of the IRU1050 is
10mA, R1 is typically selected to be 121 V resistor so
that it automatically satisfies the minimum current re-
quirement. Notice that since I ADJ is typically in the range
of 50 m A it only adds a small error to the output voltage
and should only be considered when a very precise out-
put voltage setting is required. For example, in a typical
3.3V application where R1=121 V and R2=200 V the er-
ror due to I ADJ is only 0.3% of the nominal set point.
Load Regulation
Since the IRU1050 is only a three-terminal device, it is
not possible to provide true remote sensing of the output
voltage at the load. Figure 4 shows that the best load
regulation is achieved when the bottom side of R2 is
connected to the load and the top side of R1 resistor is
connected directly to the case or the V OUT pin of the
regulator and not to the load. In fact, if R1 is connected
to the load side, the effective resistance between the
The IRU1050 requires the use of an output capacitor as
part of the frequency compensation in order to make the
regulator stable. Typical designs for microprocessor ap-
plications use standard electrolytic capacitors with a
typical ESR in the range of 50 to 100m V and an output
capacitance of 500 to 1000 m F. Fortunately as the ca-
pacitance increases, the ESR decreases resulting in a
fixed RC time constant. The IRU1050 takes advantage
of this phenomena in making the overall regulator loop
stable. For most applications a minimum of 100 m F alu-
minum electrolytic capacitor such as Sanyo MVGX se-
ries, Panasonic FA series as well as the Nichicon PL
series insures both stability and good transient response.
Thermal Design
The IRU1050 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the maximum allowable junction temperature.
Although this device can operate with junction tempera-
tures in the range of 150 8 C, it is recommended that the
selected heat sink be chosen such that during maxi-
mum continuous load operation the junction tempera-
ture is kept below this number. The example below shows
the steps in selecting the proper regulator heat sink for
the worst case current consumption using Intel 200MHz
microprocessor as the load.
4
www.irf.com
Rev. 1.8
08/20/02
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