参数资料
型号: IRU3137CSTRPBF
厂商: International Rectifier
文件页数: 9/19页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 8-SOIC
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 240kHz
占空比: 90%
电源电压: 4.25 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
IRU3137
Choose IRF7832 for both control MOSFET and synchro-
nous MOSFET. This device provides low on-resistance
in a compact SOIC 8-Pin package.
The MOSFET has the following data:
IRF7832
V DSS = 30V
I D = 20A @ 25 C
R DS(ON) = 4m ? @ V GS =10V
The total conduction losses will be:
P CON(TOTAL) = P CON(UPPER) + P CON(LOWER)
P CON(TOTAL) = 1.166W
The switching loss is more difficult to calculate, even
though the switching transition is well understood. The
reason is the effect of the parasitic components and
switching times during the switching procedures such
as turn-on / turnoff delays and rise and fall times. The
control MOSFET contributes to the majority of the switch-
ing losses in synchronous Buck converter. The synchro-
nous MOSFET turns on under zero voltage conditions,
therefore, the turn on losses for synchronous MOSFET
can be neglected. With a linear approximation, the total
switching loss can be expressed as:
These values are taken under a certain condition test.
For more details please refer to the IRF7466 and IRF7458
data sheets.
By using equation (12), we can calculate the total switch-
ing losses.
P SW(TOTAL) = 250mW
Feedback Compensation
The IRU3137 is a voltage mode controller; the control
loop is a single voltage feedback path including error
amplifier and error comparator. To achieve fast transient
response and accurate output regulation, a compensa-
tion circuit is necessary. The goal of the compensation
network is to provide a closed loop transfer function with
the highest 0dB crossing frequency and adequate phase
margin (greater than 45 ).
The output LC filter introduces a double pole, –40dB/
decade gain slope above its corner resonant frequency,
and a total phase lag of 180 (see Figure 8). The Reso-
nant frequency of the LC filter is expressed as follows:
1
F LC = ---(13)
2 π× L O × C O
V DS(OFF)
P SW =
2
Where:
×
t r + t f × I LOAD
T
---(12)
Figure 9 shows gain and phase of the LC filter. Since we
already have 180 phase shift just from the output filter,
the system risks being unstable.
V DS(OFF) = Drain to Source Voltage at off time
Gain
Phase
t r = Rise Time
t f = Fall Time
0dB
-40dB/decade
0
T = Switching Period
I LOAD = Load Current
The switching time waveform is shown in Figure 7.
V DS
F LC Frequency
-180
F LC
Frequency
90%
10%
V GS
Figure 8 - Gain and phase of LC filter.
t d (ON)
t r
t d (OFF)
t f
Figure 7 - Switching time waveforms.
From IRF7832 data sheet we obtain:
IRF7832
t r = 12.3ns
t f = 21ns
www.irf.com
9
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