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参数资料
| 型号： | IRU3138CSTRPBF |
| 厂商： | International Rectifier |
| 文件页数： | 9/18页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 14-SOIC |
| 标准包装： | 2,500 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 440kHz |
| 占空比： | 90% |
| 电源电压： | 4.25 V ~ 25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 14-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
IRU3138
Choose IRLR3715Z for control MOSFET and IRFR3711Z
for synchronous MOSFET. These devices provide low
These values are taken under a certain condition test.
For more details please refer to the IRFR3711Z datasheet.
on-resistance in a D-Pak.
By using equation (12), we can calculate the total switch-
The MOSFETs have the following data:
ing losses.
IRFL3715Z
V DSS = 20V
R DS(ON) = 11m ?
IRFR3711Z
V DSS = 20V
R DS(ON) = 5.7m ?
P SW(TOTAL) = 336mW
Feedback Compensation
The IRU3138 is a voltage mode controller; the control
loop is a single voltage feedback path including error
The total conduction losses will be:
P CON(TOTAL) = P CON(UPPER) + P CON(LOWER)
P CON(TOTAL) = 1.77W
The switching loss is more difficult to calculate, even
though the switching transition is well understood. The
reason is the effect of the parasitic components and
switching times during the switching procedures such
as turn-on / turnoff delays and rise and fall times. The
control MOSFET contributes to the majority of the switch-
ing losses in synchronous Buck converter. The synchro-
amplifier and error comparator. To achieve fast transient
response and accurate output regulation, a compensa-
tion circuit is necessary. The goal of the compensation
network is to provide a closed loop transfer function with
the highest 0dB crossing frequency and adequate phase
margin (greater than 45 ).
The output LC filter introduces a double pole, –40dB/
decade gain slope above its corner resonant frequency,
and a total phase lag of 180 (see Figure 8). The Reso-
nant frequency of the LC filter is expressed as follows:
nous MOSFET turns on under zero voltage conditions,
therefore, the turn on losses for synchronous MOSFET
can be neglected. With a linear approximation, the total
F LC =
2 π×
1
L O × C O
---(13)
switching loss can be expressed as:
Figure 9 shows gain and phase of the LC filter. Since we
P SW =
V DS(OFF)
2
×
t r + t f × I LOAD
T
---(12)
already have 180 phase shift just from the output filter,
the system risks being unstable.
Where:
V DS(OFF) = Drain to Source Voltage at off time
Gain
Phase
t r = Rise Time
t f = Fall Time
0dB
-40dB/decade
0
T = Switching Period
I LOAD = Load Current
The switching time waveform is shown in Figure 7.
F LC Frequency
-180
F LC
Frequency
V DS
90%
10%
V GS
Figure 8 - Gain and phase of LC filter.
t d (ON)
t r
t d (OFF)
t f
Figure 7 - Switching time waveforms.
From IRFR3711Z data sheet we obtain:
IRFR3711Z
t r = 13ns
t f = 15ns
www.irf.com
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