Integrated Silicon Solution, Inc.
—
1-800-379-4774
Rev. D
06/24/01
5
IS41C4400
X
IS41LV4400
X
S
ERIES
ISSI
ELECTRICAL CHARACTERISTICS
(1)
(Recommended Operating Conditions unless otherwise noted.)
Symbol
Parameter
Test Condition
Any input 0V
≤
V
IN
≤
Vcc
Other inputs not under test = 0V
V
CC
Speed
Min.
Max.
Unit
I
IL
Input Leakage Current
–
5
5
μA
I
IO
Output Leakage Current
Output is disabled (Hi-Z)
0V
≤
V
OUT
≤
Vcc
–
5
5
μA
V
OH
Output High Voltage Level
I
OH
=
–
5.0 mA, Vcc = 5V
I
OH
=
–
2.0 mA, Vcc = 3.3V
2.4
—
V
V
OL
Output Low Voltage Level
I
OL
= 4.2 mA, Vcc = 5V
I
OL
= 2 mA, Vcc = 3.3V
—
0.4
V
I
CC
1
Standby Current: TTL
RAS
,
CAS
≥
V
IH
Commercial
5V
—
—
—
—
2
mA
3.3V
5V
3.3V
0.5
3
2
Industrial
I
CC
2
Standby Current: CMOS
RAS
,
CAS
≥
V
CC
–
0.2V
5V
—
—
1
mA
3.3V
0.5
I
CC
3
Operating Current:
Random Read/Write
(2,3,4)
Average Power Supply Current
RAS
,
CAS
,
Address Cycling, t
RC
= t
RC
(min.)
-50
-60
—
—
120
110
mA
I
CC
4
Operating Current:
EDO Page Mode
(2,3,4)
Average Power Supply Current
RAS
= V
IL
,
CAS
,
Cycling t
PC
= t
PC
(min.)
-50
-60
—
—
90
80
mA
I
CC
5
Refresh Current:
RAS
-Only
(2,3)
Average Power Supply Current
RAS
Cycling,
CAS
≥
V
IH
t
RC
= t
RC
(min.)
-50
-60
—
—
120
110
mA
I
CC
6
Refresh Current:
CBR
(2,3,5)
Average Power Supply Current
RAS
,
CAS
Cycling
t
RC
= t
RC
(min.)
-50
-60
—
—
120
110
mA
Notes:
1. An initial pause of 200 μs is required after power-up followed by eight
RAS
refresh cycles (
RAS
-Only or CBR) before proper device
operation is assured. The eight
RAS
cycles wake-up should be repeated any time the t
REF
refresh requirement is exceeded.
2. Dependent on cycle rates.
3. Specified values are obtained with minimum cycle time and the output open.
4. Column-address is changed once each EDO page cycle.
5. Enables on-chip refresh and address counters.