- 您现在的位置：买卖IC网 > PDF目录360990 > IS61SF6432-10PQ Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 PDF资料下载
参数资料
| 型号： | IS61SF6432-10PQ |
| 英文描述： | Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 |
| 中文描述： | 64K的× 32 SYNCHRONOU仛流，通过静态内存 |
| 文件页数： | 14/16页 |
| 文件大小： | 480K |
| 代理商： | IS61SF6432-10PQ |
IS61SF6432
14
Integrated Circuit Solution Inc.
SSR004-0B
SNOOZE AND RECOVERY CYCLE SWITCHING CHARACTERISTICS
(Over Operating Range)
-9
-10
Min.
Symbol
Parameter
Min. Max.
Max.
Unit
t
KC
Cycle Time
13
—
15
—
ns
t
KH
Clock High Time
6
—
6
—
ns
t
KL
Clock Low Time
6
—
6
—
ns
t
KQ
Clock Access Time
—
9
—
10
ns
t
KQX
(4)
Clock High to Output Invalid
2
—
2
—
ns
t
KQLZ
(4,5)
Clock High to Output Low-Z
0
—
0
—
ns
t
KQHZ
(4,5)
Clock High to Output High-Z
2
6
2
6
ns
t
OEQ
Output Enable to Output Valid
—
6
—
6
ns
t
OEQX
(4)
Output Disable to Output Invalid
0
—
0
—
ns
t
OELZ
(4,5)
Output Enable to Output Low-Z
0
—
0
—
ns
t
OEHZ
(4,5)
Output Disable to Output High-Z
—
6
—
6
ns
t
AS
Address Setup Time
2.5
—
2.5
—
ns
t
SS
Address Status Setup Time
2.5
—
2.5
—
ns
t
CES
Chip Enable Setup Time
2.5
—
2.5
—
ns
t
AH
Address Hold Time
0.5
—
0.5
—
ns
t
SH
Address Status Hold Time
0.5
—
0.5
—
ns
t
CEH
Chip Enable Hold Time
0.5
—
0.5
—
ns
t
ZZS
ZZ Standby
(1)
2
—
2
—
cyc
t
ZZREC
ZZ Recovery
(2)
2
—
2
—
cyc
t
CFG
Configuration Setup
(3)
52
—
60
—
ns
Notes:
1. The assertion of ZZ allows the SRAM to enter a lower power state than when deselected within the time specified. Data
retention is guaranteed when ZZ is asserted and clock remains active.
2. ADSC and ADSP must not be asserted for at least 2 cyc after leaving ZZ state.
3. Configuration signal MODE is static and must not change during normal operation.
4. Guaranteed but not 100% tested. This parameter is periodically sampled.
5. Tested with load in Figure 2.
相关PDF资料 |
PDF描述 |
|---|---|
| IS61SF6432-10PQI | 64K x 32 SYNCHRONOUS FLOW-THROUGH STATIC RAM |
| IS61SF6432-10TQ | 64K x 32 SYNCHRONOUS FLOW-THROUGH STATIC RAM |
| IS61SF6432-10TQI | Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 |
| IS61SF6432-9PQ | Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 |
| IS61SF6432-9TQ | 64K x 32 SYNCHRONOUS FLOW-THROUGH STATIC RAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IS61SP12836-133B | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS61SP12836-133TQ-T | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Sync Quad 3.3V 4.5M-Bit 128K x 36 4ns 100-Pin TQFP T/R |
| IS61SP12836-166B | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS61SP12836-200B | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS61SP6464-100PQ | 制造商:Integrated Silicon Solution Inc 功能描述: |
发布紧急采购，3分钟左右您将得到回复。