参数资料
型号: IS61SP25618-133B
厂商: INTEGRATED SILICON SOLUTION INC
元件分类: SRAM
英文描述: 256K x 16, 256K x 18 SYNCHRONOUS PIPELINED STATIC RAM
中文描述: 256K X 18 CACHE SRAM, 4 ns, PBGA119
封装: PLASTIC, BGA-119
文件页数: 3/15页
文件大小: 120K
代理商: IS61SP25618-133B
IS61SP25616
IS61SP25618
ISSI
Integrated Silicon Solution, Inc. — 1-800-379-4774
11
Rev. A
04/17/01
WRITE CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
-
166
-150
-133
-5
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
tKC(1)
Cycle Time
6
6.7
7.5
10
ns
tKH(1)
Clock High Time
2.4
2.6
2.8
4
ns
tKL(1)
Clock Low Time
2.4
2.6
2.8
4
ns
tAS(1)
Address Setup Time
2
2
2
2
ns
tSS(1)
Address Status Setup Time
2
2
2
2
ns
tWS(1)
Write Setup Time
2
2
2
2
ns
tDS(1)
Data In Setup Time
2
2
2
2
ns
tCES(1)
Chip Enable Setup Time
2
2
2
2
ns
tAVS(1)
Address Advance Setup Time
2
2
2
2
ns
tAH(1)
Address Hold Time
0.5
0.5
0.5
0.5
ns
tSH(1)
Address Status Hold Time
0.5
0.5
0.5
0.5
ns
tDH(1)
Data In Hold Time
0.5
0.5
0.5
0.5
ns
tWH(1)
Write Hold Time
0.5
0.5
0.5
0.5
ns
tCEH(1)
Chip Enable Hold Time
0.5
0.5
0.5
0.5
ns
tAVH(1)
Address Advance Hold Time
0.5
0.5
0.5
0.5
ns
Note:
1. Tested with load in Figure 1.
相关PDF资料
PDF描述
IS61SP25618-133TQ Octal Transparent D-Type Latches With 3-State Outputs 20-SSOP -40 to 85
IS61SP25618-133TQI Octal Transparent D-Type Latches With 3-State Outputs 20-SSOP -40 to 85
IS61SP25618-150B Octal Transparent D-Type Latches With 3-State Outputs 20-SSOP -40 to 85
IS61SP25618-150TQ Octal Transparent D-Type Latches With 3-State Outputs 20-SOIC -40 to 85
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