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参数资料
| 型号： | IS80C32-24W |
| 厂商： | INTEGRATED SILICON SOLUTION INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, 24 MHz, MICROCONTROLLER, PDIP40 |
| 封装： | 0.600 INCH, PLASTIC, DIP-40 |
| 文件页数： | 25/48页 |
| 文件大小： | 379K |
| 代理商： | IS80C32-24W |
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IS80C52
IS80C32
Integrated Silicon Solution, Inc. — 1-800-379-4774
31
MC004-1D
11/19/98
ISSI
Thus, the processor acknowledges an interrupt request
by executing a hardware-generated LCALL to the
appropriate servicing routine. In some cases it also clears
the flag that generated the interrupt, and in other cases it
does not. It never clears the Serial Port or Timer 2 flags.
This must be done in the user's software. The processor
clears an external interrupt flag (IE0 or IE1) only if it was
transition-activated. The hardware-generated LCALL
pushes the contents of the Program Counter onto the
stack (but it does not save the PSW) and reloads the PC
with an address that depends on the source of the
interrupt being serviced, as follows:
Interrupt
Cleared by
Vector
Source
Request Bits
Hardware
Address
INT0
IE0
No (level)
0003H
Yes (trans.)
Timer 0
TF0
Yes
000BH
INT1
IE1
No (level)
0013H
Yes (trans.)
Timer 1
TF1
Yes
001BH
Serial Port
RI, TI
No
0023H
Timer 2
TF2, EXF2
No
002BH
System
RST
0000H
Reset
Execution proceeds from that location until the RETI
instruction is encountered. The RETI instruction informs
the processor that this interrupt routine is no longer in
progress, then pops the top two bytes from the stack and
reloads the Program Counter. Execution of the interrupted
program continues from where it left off.
Note that a simple RET instruction would also have
returned execution to the interrupted program, but it
would have left the interrupt control system thinking an
interrupt was still in progress.
SFR Register and
Interrupt
Flag
Bit Position
External 0
IE0
TCON.1
External 1
IE1
TCON.3
Timer 1
TF1
TCON.7
Timer 0
TF0
TCON.5
Serial Port
TI
SCON.1
Serial Port
RI
SCON.0Timer 2
TF2
T2CON.7
Timer 2
EXF2
T2CON.6
When an interrupt is accepted the following action occurs:
1. The current instruction completes operation.
2. The PC is saved on the stack.
3. The current interrupt status is saved internally.
4. Interrupts are blocked at the level of the interrupts.
5. The PC is loaded with the vector address of the ISR
(interrupts service routine).
6. The ISR executes.
The ISR executes and takes action in response to the
interrupt. The ISR finishes with RETI (return from interrupt)
instruction. This retrieves the old value of the PC from the
stack and restores the old interrupt status. Execution of
the main program continues where it left off.
External Interrupts
The external sources can be programmed to be level-
activated or transition-activated by setting or clearing bit
IT1 or IT0 in Register TCON. If ITx= 0, external interrupt
x is triggered by a detected low at the INTx pin. If ITx = 1,
external interrupt x is edge-triggered. In this mode if
successive samples of the INTx pin show a high in one
cycle and a low in the next cycle, interrupt request flag IEx
in TCON is set. Flag bit IEx then requests the interrupt.
相关PDF资料 |
PDF描述 |
|---|---|
| IS80C32-12PLI | 8-BIT, 12 MHz, MICROCONTROLLER, PQCC44 |
| IS80C32-12PL | 8-BIT, 12 MHz, MICROCONTROLLER, PQCC44 |
| IS80C32-40PLI | 8-BIT, 40 MHz, MICROCONTROLLER, PQCC44 |
| IS80C52PL | 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQCC44 |
| IS80C732-C | 8-BIT, 12 MHz, MICROCONTROLLER, PQCC44 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IS80C32-24WI | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER |
| IS80C32-25 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
| IS80C32-25R | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
| IS80C32-30 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
| IS80C32-30R | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
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