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| 型号： | IS82C37A-12 |
| 厂商： | Harris Corporation |
| 英文描述： | CMOS High Performance Programmable DMA Controller |
| 中文描述： | 高性能的CMOS可编程DMA控制器 |
| 文件页数： | 4/23页 |
| 文件大小： | 204K |
| 代理商： | IS82C37A-12 |
4-195
82C37A
EOP
36
I/O
END OF PROCESS: End of Process (EOP) is an active low bidirectional signal. Information
concerning the completion of DMA services is available at the bidirectional EOP pin.
The 82C37A allows an external signal to terminate an active DMA service by pulling the EOP pin
low. A pulse is generated by the 82C37A when terminal count (TC) for any channel is reached,
except for channel 0 in memory-to-memory mode. During memory-to-memory transfers, EOP will
be output when the TC for channel 1 occurs.
The EOP pin is driven by an open drain transistor on-chip, and requires an external pull-up resistor
to V
CC
.
When an EOP pulse occurs, whether internally or externally generated, the 82C37A will terminate
the service, and if autoinitialize is enabled, the base registers will be written to the current registers
of that channel. The mask bit and TC bit in the status word will be set for the currently active channel
by EOP unless the channel is programmed for autoinitialize. In that case, the mask bit remains clear.
A0-A3
32-35
I/O
ADDRESS: The four least significant address lines are bidirectional three-state signals. In the Idle
cycle, they are inputs and are used by the 82C37A to address the control register to be loaded or
read. In the Active cycle, they are outputs and provide the lower 4-bits of the output address.
A4-A7
37-40
O
ADDRESS: The four most significant address lines are three-state outputs and provide 4-bits of
address. These lines are enabled only during the DMA service.
HRQ
10
O
HOLD REQUEST: The Hold Request (HRQ) output is used to request control of the system bus.
When a DREQ occurs and the corresponding mask bit is clear, or a software DMA request is made,
the 82C37A issues HRQ. The HLDA signal then informs the controller when access to the system
busses is permitted. For stand-alone operation where the 82C37A always controls the busses, HRQ
may be tied to HLDA. This will result in one S0 state before the transfer.
DACK0-
DACK3
14, 15
24, 25
O
DMA ACKNOWLEDGE: DMA acknowledge is used to notify the individual peripherals when one
has been granted a DMA cycle. The sense of these lines is programmable. RESET initializes them
to active low.
AEN
9
O
ADDRESS ENABLE: Address Enable enables the 8-bit latch containing the upper 8 address bits
onto the system address bus. AEN can also be used to disable other system bus drivers during DMA
transfers. AEN is active high.
ADSTB
8
O
ADDRESS STROBE: This is an active high signal used to control latching of the upper address
byte. It will drive directly the strobe input of external transparent octal latches, such as the 82C82.
During block operations, ADSTB will only be issued when the upper address byte must be updated,
thus speeding operation through elimination of S1 states. ADSTB timing is referenced to the falling
edge of the 82C37A clock.
MEMR
3
O
MEMORY READ: The Memory Read signal is an active low three-state output used to access data
from the selected memory location during a DMA Read or a memory-to-memory transfer.
MEMW
4
O
MEMORY WRITE: The Memory Write signal is an active low three-state output used to write data
to the selected memory location during a DMA Write or a memory-to-memory transfer.
NC
5
NO CONNECT: Pin 5 is open and should not be tested for continuity.
Pin Description
(Continued)
SYMBOL
PIN
NUMBER
TYPE
DESCRIPTION
相关PDF资料 |
PDF描述 |
|---|---|
| IS82C37A | CMOS High Performance Programmable DMA Controller |
| IS82C37A-5 | CMOS High Performance Programmable DMA Controller |
| IS82C37A-12 | SCHOTTKY 30V DIODE SOT23 COMMON CATHODE |
| IS82C37A | RES CHP 2.2K 1/8W 5% |
| IS82C37A-5 | CMOS High Performance Programmable DMA Controller |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IS82C37A-5 | 功能描述:外围驱动器与原件 - PCI DMA CONTROLLER IC -4 0+85C 5.0V 5.0MHZ DM RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| IS82C50A | 制造商:未知厂家 制造商全称:未知厂家 功能描述:UART |
| IS82C50A-5 | 功能描述:UART 接口集成电路 PERIPH UART/BRG 5V 10MHZ 44PLCC IND RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| IS82C50A-5Z | 功能描述:UART 接口集成电路 W/ANNEAL PERIPH UART /BRG 5V 10MHZ RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| IS82C52 | 功能描述:UART 接口集成电路 PERIPH UART/BRG 5V 16MHZ 28PLCC IND RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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