参数资料
| 型号： | ISL12022MIBZ-T7A |
| 厂商： | Intersil |
| 文件页数： | 14/31页 |
| 文件大小： | 0K |
| 描述： | IC RTC/CALENDAR TEMP SNSR 20SOIC |
| 应用说明： | Addressing Power Issues in Real Time Clock Appls |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 250 |
| 类型： | 时钟/日历 |
| 特点： | 警报器，夏令时，闰年，SRAM |
| 存储容量： | 128B |
| 时间格式： | HH:MM:SS（12/24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电压 - 电源，电池： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 20-SOIC |
| 包装： | 带卷 (TR) |
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ISL12022M
21
FN6668.9
June 20, 2012
Example 2
Pulsed interrupt once per minute (IM = “1”)
Interrupts at one minute intervals when the seconds register is
at 30 seconds.
Set Alarm registers as follows:
Once the registers are set, the following waveform will be seen at
IRQ/FOUT:
Note that the status register ALM bit will be set each time the
alarm is triggered, but does not need to be read or cleared.
Time Stamp VDD to Battery Registers (TSV2B)
The TSV2B Register bytes are identical to the RTC register bytes,
except they do not extend beyond the Month. The Time Stamp
captures the FIRST VDD to Battery Voltage transition time, and will
not update upon subsequent events until cleared (only the first event
is captured before clearing). Set CLRTS = 1 to clear this register (Add
09h, PWR_VDD register).
Note that the time stamp registers are cleared to all “0”,
including the month and day, which is different from the RTC and
alarm registers (those registers default to 01h). This is the
indicator that no time stamping has occurred since the last clear
or initial power-up. Once a time stamp occurs, there will be a non-
zero time stamp.
Time Stamp Battery to VDD Registers (TSB2V)
The Time Stamp Battery to VDD Register bytes are identical to the
RTC register bytes, except they do not extend beyond Month. The
Time Stamp captures the LAST transition of VBAT to VDD (only the
last event of a series of power-up/power-down events is
retained). Set CLRTS = 1 to clear this register (Add 09h, PWR_VDD
register).
DST Control Registers (DSTCR)
8 bytes of control registers have been assigned for the Daylight
Savings Time (DST) functions. DST beginning (set Forward) time
is controlled by the registers DstMoFd, DstDwFd, DstDtFd, and
DstHrFd. DST ending time (set Backward or Reverse) is controlled
by DstMoRv, DstDwRv, DstDtRv and DstHrRv.
DST FORWARD REGISTERS (20H TO 23H)
DST forward is controlled by the following DST Registers:
DST Enable
DSTE is the DST Enabling Bit located in bit 7 of register 20h
(DstMoFdxx). Set DSTE = 1 will enable the DSTE function. Upon
powering up for the first time (including battery), the DSTE bit
defaults to “0”. When DSTE is set to “1” the RTC time must be at
least one hour before the scheduled DST time change for the
correction to take place. When DSTE is set to “0”, the DSTADJ bit
in the Status Register automatically resets to “0”.
DST Month Forward
DstMoFd sets the Month that DST starts. The format is the same
as for the RTC register month, from 1 to 12. The default value for
the DST begin month is 00h.
DST Day/Week Forward
DstDwFd contains both the Day of the Week and the Week of the
Month data for DST Forward control. DST can be controlled either
by actual date or by setting both the Week of the month and the
Day of the Week. DstDwFdE sets the priority of the Day/Week
over the Date. For DstDwFdE = 1, Day/Week is the priority. You
must have the correct Day of Week entered in the RTC registers
for the Day/Week correction to work properly.
Bits 0, 1, 2 contain the Day of the week information which sets
the Day of the Week that DST starts. Note that Day of the week
counts from 0 to 6, like the RTC registers. The default for the
DST Forward Day of the Week is 00h (normally Sunday).
Bits 3, 4, 5 contain the Week of the Month information that sets
the week that DST starts. The range is from 1 to 5, and Week 7
is used to indicate the last week of the month. The default for
the DST Forward Week of the Month is 00h.
DST Date Forward
DstDtfd controls which Date DST begins. The format for the Date
is the same as for the RTC register, from 1 to 31. The default
value for DST forward date is 00h. DstDtFd is only effective if
DstDwFdE = 0.
DST Hour Forward
DstHrFd controls the hour that DST begins. The RTC hour and
DstHrFd registers have the same formats except there is no Military
bit for DST hour. The user sets the DST hour with the same format as
used for the RTC hour (AM/PM or MIL) but without the MIL bit, and
the DST will still advance as if the MIL bit were there. The default
value for DST hour Forward is 00h.
ALARM
REGISTER
BIT
DESCRIPTION
7654321 0 HEX
SCA0
101100 00 B0h Seconds set to 30,
enabled
MNA0
000000 00 00h Minutes disabled
HRA0
000000 00 00h Hours disabled
DTA0
000000 00 00h Date disabled
MOA0
000000 00 00h Month disabled
DWA0
000000 00 00h Day of week disabled
60s
RTC AND ALARM REGISTERS ARE BOTH “30s”
FIGURE 16. IRQ/FOUT WAVEFORM
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