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参数资料
| 型号： | ISL1208IB8-TK |
| 厂商： | INTERSIL CORP |
| 元件分类： | XO, clock |
| 英文描述： | I2C Real Time Clock/Calendar |
| 中文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO8 |
| 封装： | SOIC-8 |
| 文件页数： | 4/21页 |
| 文件大小： | 393K |
| 代理商： | ISL1208IB8-TK |
4
FN8085.3
July 29, 2005
Cpin
SDA and SCL pin capacitance
T
A
= 25°C, f = 1MHz, V
DD
= 5V,
V
IN
= 0V, V
OUT
= 0V
10
pF
f
SCL
SCL frequency
400
kHz
t
IN
Pulse width suppression time at SDA
and SCL inputs
Any pulse narrower than the max spec
is suppressed.
50
ns
t
AA
SCL falling edge to SDA output data
valid
SCL falling edge crossing 30% of V
DD
,
until SDA exits the 30% to 70% of V
DD
window.
900
ns
t
BUF
Time the bus must be free before the
start of a new transmission
SDA crossing 70% of V
DD
during a
STOP condition, to SDA crossing 70%
of V
DD
during the following START
condition.
1300
ns
t
LOW
Clock LOW time
Measured at the 30% of V
DD
crossing.
1300
ns
t
HIGH
Clock HIGH time
Measured at the 70% of V
DD
crossing.
600
ns
t
SU:STA
START condition setup time
SCL rising edge to SDA falling edge.
Both crossing 70% of V
DD
.
600
ns
t
HD:STA
START condition hold time
From SDA falling edge crossing 30% of
V
DD
to SCL falling edge crossing 70%
of V
DD
.
600
ns
t
SU:DAT
Input data setup time
From SDA exiting the 30% to 70% of
V
DD
window, to SCL rising edge
crossing 30% of V
DD
100
ns
t
HD:DAT
Input data hold time
From SCL falling edge crossing 30% of
V
DD
to SDA entering the 30% to 70%
of V
DD
window.
0
900
ns
t
SU:STO
STOP condition setup time
From SCL rising edge crossing 70% of
V
DD
, to SDA rising edge crossing 30%
of V
DD
.
600
ns
t
HD:STO
STOP condition hold time
From SDA rising edge to SCL falling
edge. Both crossing 70% of V
DD
.
600
ns
t
DH
Output data hold time
From SCL falling edge crossing 30% of
V
DD
, until SDA enters the 30% to 70%
of V
DD
window.
0
ns
t
R
SDA and SCL rise time
From 30% to 70% of V
DD
20 +
0.1 x Cb
300
ns
t
F
SDA and SCL fall time
From 70% to 30% of V
DD
20 +
0.1 x Cb
300
ns
Cb
Capacitive loading of SDA or SCL
Total on-chip and off-chip
10
400
pF
Rpu
SDA and SCL bus pull-up resistor off-
chip
Maximum is determined by t
R
and t
F
.
For Cb = 400pF, max is about 2~2.5k
.
For Cb = 40pF, max is about 15~20k
1
k
NOTES:
1. IRQ & F
OUT
Inactive.
2. LPMODE = 0 (default).
3. In order to ensure proper timekeeping, the V
DD SR-
specification must be followed.
4. Typical values are for T = 25°C and 3.3V supply voltage.
Serial Interface Specifications
Over the recommended operating conditions unless otherwise specified.
(Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
(Note 4)
MAX
UNITS
NOTES
ISL1208
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL1208IB8Z | 功能描述:实时时钟 I2C REAL TIME CLOCK/ CALENDAR 8LD RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| ISL1208IB8ZR5291 | 功能描述:实时时钟 I2CAL TIME CLK/CLNDR ALL BATRY MODE TESTS RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| ISL1208IB8Z-T7A | 功能描述:实时时钟 I2CAL TIME CLK/CLNDR 8LD RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| ISL1208IB8Z-TK | 功能描述:实时时钟 I2C REAL TIME CLOCK/ CALENDAR 8LD RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| ISL1208IB8Z-TKR5291 | 功能描述:实时时钟 I2CAL TIME CLK/CLNDR BATRY MODE TESTS RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
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