参数资料
| 型号： | ISL1209IU10Z-TK |
| 厂商： | Intersil |
| 文件页数： | 6/24页 |
| 文件大小： | 0K |
| 描述： | IC RTC LP SRAM EEPROM 10-MSOP |
| 标准包装： | 1 |
| 类型： | 时间事件记录器 |
| 特点： | 警报器，闰年，SRAM |
| 存储容量： | 2B |
| 时间格式： | HH:MM:SS（12/24 小时） |
| 数据格式： | YY-MM-DD-dd |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电压 - 电源，电池： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 标准包装 |
| 产品目录页面： | 1245 (CN2011-ZH PDF) |
| 其它名称： | ISL1209IU10Z-TKDKR |
14
FN6109.4
October 17, 2006
AUTO RESET ENABLE BIT (ARST)
This bit enables/disables the automatic reset of the BAT and
ALM status bits only. When ARST bit is set to “1”, these
status bits are reset to “0” after a valid read of the respective
status register (with a valid STOP condition). When the
ARST is cleared to “0”, the user must manually reset the
BAT and ALM bits.
INTERRUPT CONTROL REGISTER (INT)
FREQUENCY OUT CONTROL BITS (FO <3:0>)
These bits enable/disable the frequency output function and
select the output frequency at the IRQ/FOUT pin. See
Table 8 for frequency selection. When the frequency mode is
enabled, it will override the alarm mode at the IRQ/FOUT pin.
FREQUENCY OUTPUT AND INTERRUPT BIT (FOBATB)
This bit enables/disables the FOUT/IRQ pin during battery
backup mode (i.e. VBAT power source active). When the
FOBATB is set to “1” the FOUT/IRQ pin is disabled during
battery backup mode. This means that both the frequency
output and alarm output functions are disabled. When the
FOBATB is cleared to “0”, the FOUT/IRQ pin is enabled
during battery backup mode.
LOW POWER MODE BIT (LPMODE)
This bit enables/disables low power mode. With
LPMODE = “0”, the device will be in normal mode and the
VBAT supply will be used when VDD < VBAT - VBATHYS and
VDD < VTRIP. With LPMODE = “1”, the device will be in low
power mode and the VBAT supply will be used when
VDD < VBAT -VBATHYS. There is a supply current saving of
about 600nA when using LPMODE = “1” with VDD = 5V.
(See Typical Performance Curves: IDD vs VDD with
LPMODE ON & OFF.)
ALARM ENABLE BIT (ALME)
This bit enables/disables the alarm function. When the ALME
bit is set to “1”, the alarm function is enabled. When the ALME
is cleared to “0”, the alarm function is disabled. The alarm
function can operate in either a single event alarm or a periodic
interrupt alarm (see IM bit).
NOTE: When the frequency output mode is enabled, the alarm function
is disabled.
INTERRUPT/ALARM MODE BIT (IM)
This bit enables/disables the interrupt mode of the alarm
function. When the IM bit is set to “1”, the alarm will operate
in the interrupt mode, where an active low pulse width of
250ms will appear at the IRQ/FOUT pin when the RTC is
triggered by the alarm as defined by the alarm registers (0Ch
to 11h). When the IM bit is cleared to “0”, the alarm will
operate in standard mode, where the IRQ/FOUT pin will be
tied low until the ALM status bit is cleared to “0”.
EVENT DETECTION REGISTER (EV)
The ISL1209 provides an easy to use event and tamper
detection circuit. The Event Detection Register configures
the functionality of the event detection circuits.
EVENT INPUT SAMPLING SELECTION BITS
(ESMP<1:0>)
These two bits select the rate of sampling of the EVIN pin to
trigger an event detection. For example, a 2Hz sampling rate
would configure the ISL1209 to check the status of the EV
pin twice a second. Slower sampling significantly reduces
the supply current drain.
TABLE 7. INTERRUPT CONTROL REGISTER (INT)
ADDR
7
6
5
4
3210
08h
IM
ALME
LPMODE FOBATB FO3 FO2 FO1 FO0
Default
0
0000
TABLE 8. FREQUENCY SELECTION OF FOUT PIN
FREQUENCY,
FOUT
UNITS
FO3
FO2
FO1
FO0
0
Hz
0
000
32768
Hz
0
1
4096
Hz
0
1
0
1024
Hz
0
1
64
Hz
0
100
32
Hz
0
101
16
Hz
0
110
8
Hz
0
111
4
Hz
1
000
2
Hz
1
001
1
Hz
1
010
1/2
Hz
1
011
1/4
Hz
1
100
1/8
Hz
1
101
1/16
Hz
1
0
1/32
Hz
1
TABLE 9.
IM BIT
INTERRUPT/ALARM FREQUENCY
0
Single Time Event Set By Alarm
1
Repetitive/Recurring Time Event Set By Alarm
TABLE 10.
ESMP1
ESMP0
EVENT SAMPLING RATE
0
Always ON
01
2Hz
10
1Hz
11
1/4Hz
ISL1209
相关PDF资料 |
PDF描述 |
|---|---|
| VI-J3Z-EY-F4 | CONVERTER MOD DC/DC 2V 20W |
| VI-J1P-MZ | CONVERTER MOD DC/DC 13.8V 25W |
| VE-J11-MZ | CONVERTER MOD DC/DC 12V 25W |
| VI-J3Z-EY-F2 | CONVERTER MOD DC/DC 2V 20W |
| VI-J11-MZ | CONVERTER MOD DC/DC 12V 25W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL1218 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM |
| ISL1218IBZ | 功能描述:实时时钟 REAL TIME CLKRTC IN 8LD RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| ISL1218IBZ-T | 功能描述:实时时钟 REAL TIME CLKRTC IN 8LD RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| ISL1218IUZ | 功能描述:实时时钟 REAL TIME CLKRTC IN RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| ISL1218IUZ-T | 功能描述:实时时钟 REAL TIME CLKRTC IN RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
发布紧急采购，3分钟左右您将得到回复。