参数资料
型号: ISL24201IRTZ
厂商: Intersil
文件页数: 9/12页
文件大小: 0K
描述: IC VCOM CALIBRATOR I2C 8TDFN
标准包装: 100
类型: 校准器
应用: LCD 显示器
安装类型: 表面贴装
封装/外壳: 8-WSDFN 裸露焊盘
供应商设备封装: 8-TDFN(3x3)
包装: 管件
ISL24201
6
FN7586.1
December 9, 2010
DCP (Digitally Controlled Potentiometer)
Figure 4 shows the relationship between the register value and
the resistor string of the DCP. Note that the register value of zero
actually selects the first step of the resistor string. The output
voltage of the DCP is given by Equation 1:
Output Current Sink
Figure 5 shows the schematic of the OUT pin current sink. The
circuit made up of amplifier A1, transistor Q1, and resistor RSET
forms a voltage controlled current source.
The external RSET resistor sets the full-scale sink current that
determines the lowest output voltage of the external voltage divider
R1 and R2. IOUT is calculated as shown by Equation 2:
The maximum value of IOUT can be calculated by substituting the
maximum register value of 255 into Equation 2, resulting in
Equation 3:
Equation 2 can also be used to calculate the unit sink current
step size by removing the Register Value term from it as shown in
Equation 4.
The voltage difference between the OUT pin and SET pin, which are
also the drain and source of the output transistor, should be greater
than the minimum saturation voltage for the IOUT(MAX) being used.
This will keep the output transistor in its saturation region to
maintain linear operation over the full range of register values.
Figure 6 shows IDS vs VDS for transistor Q1. The line labeled
"Minimum Saturation Voltage" is the minimum voltage that should
be maintained across the drain and source of Q1. To find the
minimum saturation voltage for a specific condition, locate the
voltage at the intersection of the IOUT(MAX) value from Equation 3
and the line labeled "Minimum Saturation Voltage".
VDCP
RegisterValue 1
+
256
---------------------------------------------------
AVDD
20
--------------
=
(EQ. 1)
AVDD
19R
R
0
1
2
255
254
253
252
251
REGISTER
VALUE
AVDD
20
VDCP
FIGURE 4. SIMPLIFIED SCHEMATIC OF DIGITAL CONTROL
POTENTIOMETER (DCP)
AVDD
RSET
VDCP
SET
OUT
AVDD
IOUT
R1
R2
VSAT
VSET = (IOUT)*(RSET) = VDCP
Q1
A1
VOUT
FIGURE 5. CURRENT SINK CIRCUIT
IOUT
VDCP
RSET
-------------
RegisterValue 1
+
256
---------------------------------------------------
AVDD
20
--------------
1
RSET
-------------
==
(EQ. 2)
IOUT MAX
()
AVDD
20RSET
--------------------
=
(EQ. 3)
ISTEP
AVDD
256
() 20
() RSET
()
----------------------------------------------
=
(EQ. 4)
FIGURE 6. IDS vs VDS FOR THE ISL24201 OUTPUT TRANSISTOR
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
012
34
5
6
7
8
9
10
VDS (V)
SATURATION REGION
IDS
(
m
A)
MINIMUM SATURATION
VOLTAGE
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