参数资料
型号: ISL28108FRTZ-T7
厂商: Intersil
文件页数: 15/34页
文件大小: 0K
描述: IC OPAMP GP RR 1.2MHZ 8TDFN
标准包装: 1,000
放大器类型: 通用
电路数: 1
输出类型: 满摆幅
转换速率: 0.45 V/µs
增益带宽积: 1.2MHz
电流 - 输入偏压: 13nA
电压 - 输入偏移: 25µV
电流 - 电源: 185µA
电流 - 输出 / 通道: 30mA
电压 - 电源,单路/双路(±): 3 V ~ 40 V,±1.5 V ~ 20 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-TDFN(3x3)
包装: 带卷 (TR)
ISL28108, ISL28208, ISL28408
FN6935.5
March 4, 2014
Unused Channels
If the application requires only one channel, the user must
configure any unused channel to prevent it from oscillating.
Unused channels can oscillate if the input and output pins are
floating. This will result in higher-than-expected supply currents
and possible noise injection into the channel being used. The
proper way to prevent oscillation is to short the output to the
inverting input, and ground the positive input (Figure 66).
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power supply conditions. It
is therefore important to calculate the maximum junction
temperature (TJMAX) for all applications to determine if power
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These parameters
are related using Equation 1:
where:
PDMAXTOTAL is the sum of the maximum power dissipation of
each amplifier in the package (PDMAX)
PDMAX for each amplifier can be calculated using Equation 2:
where:
TMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
PDMAX = Maximum power dissipation of 1 amplifier
VS = Total supply voltage
IqMAX = Maximum quiescent supply current of 1 amplifier
VOUTMAX = Maximum output voltage swing of the application
RL = Load resistance
ISL28108, ISL28208, ISL28408 SPICE Model
Figure 67 shows the SPICE model schematic and Figure 68 shows
the net list for the SPICE model. The model is a simplified version
of the actual device and simulates important AC and DC
parameters. AC parameters incorporated into the model are: 1/f
and flat band noise voltage, Slew Rate, CMRR, Gain and Phase.
The DC parameters are IOS, total supply current and output voltage
swing. The model uses typical parameters given in the “Electrical
Specifications” Table beginning on page 6. The AVOL is adjusted
for 122dB with the dominant pole at 1Hz. The CMRR is set 128dB,
f = 6kHz. The input stage models the actual device to present an
accurate AC representation. The model is configured for ambient
temperature of +25°C.
Figures 69 through 83 show the characterization vs simulation
results for the Noise Voltage, Open Loop Gain Phase, Closed Loop
Gain vs Frequency, Gain vs Frequency vs RL, CMRR, Large Signal
10V Step Response, Small Signal 0.05V Step and Output Voltage
Swing ±15V supplies.
LICENSE STATEMENT
The information in this SPICE model is protected under the
United States copyright laws. Intersil Corporation hereby grants
users of this macro-model hereto referred to as “Licensee”, a
nonexclusive, nontransferable licence to use this model as long
as the Licensee abides by the terms of this agreement. Before
using this macro-model, the Licensee should read this license. If
the Licensee does not accept these terms, permission to use the
model is not granted.
The Licensee may not sell, loan, rent, or license the
macro-model, in whole, in part, or in modified form, to anyone
outside the Licensee’s company. The Licensee may modify the
macro-model to suit his/her specific applications, and the
Licensee may make copies of this macro-model for use within
their company only.
This macro-model is provided “AS IS, WHERE IS, AND WITH NO
WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED,
INCLUDING, BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.”
In no event will Intersil be liable for special, collateral, incidental,
or consequential damages in connection with or arising out of
the use of this macro-model. Intersil reserves the right to make
changes to the product and the macro-model without prior
notice.
FIGURE 66. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
-
+
T
JMAX
T
MAX
θ
JAxP DMAXTOTAL
+
=
(EQ. 1)
PD
MAX
V
S
I
qMAX
V
S
(
- V
OUTMAX )
V
OUTMAX
R
L
----------------------------
×
+
×
=
(EQ. 2)
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