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参数资料
| 型号： | ISL28470EVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 5/18页 |
| 文件大小： | 0K |
| 描述： | EVALUATION PLATFORM ISL28470 |
| 标准包装： | 1 |
| 每 IC 通道数： | 4 - 四 |
| 放大器类型： | 仪表 |
| 输出类型： | 单端，满摆幅 |
| 转换速率： | 0.5 V/µs |
| -3db带宽： | 240kHz |
| 电流 - 输出 / 通道： | 29mA |
| 工作温度： | -40°C ~ 125°C |
| 电流供应（主 IC）： | 260µA |
| 电压 - 电源，单路/双路(±)： | 2.4 V ~ 5.5 V，±1.2 V ~ 2.75 V |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL28470 |
13
FN6260.6
October 21, 2009
FIGURE 47. + SLEW RATE vs TEMPERATURE,
INPUT = ±0.015V AT GAIN = +10
FIGURE 48. - SLEW RATE vs TEMPERATURE, INPUT =
±0.15V AT GAIN = +10
Typical Performance Curves
V+ = +5V, V- = 0V VCM = 1/2V+, VEN = V-, RL = Open, TA = +25°C,
unless otherwise specified. (Continued)
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
0.35
0.40
0.45
0.50
0.55
0.60
0.65
0.70
0.75
+
S
L
EW
R
A
TE
(V
/s)
n = 1000
MIN
MAX
MEDIAN
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
-SLEW
RA
TE
(V
/s)
0.40
0.45
0.50
0.55
0.60
0.65
0.70
0.75
0.80
n = 1000
MIN
MAX
MEDIAN
Pin Descriptions
ISL28270
16 Ld QSOP
ISL28273
16 Ld QSOP
ISL28470
28 Ld QSOP
PIN NAME
EQUIVALENT
CIRCUIT
PIN FUNCTION
2, 15
1, 13
16, 28
OUT_A,B
C_D
Circuit 3
Output Voltage. A complementary Class AB common-source output
stage drives the output of each channel. When disabled, the outputs
are in a high impedance state
3, 14
2, 12
17, 27
FB+_A,B
C_D
Circuit 1A,
Circuit 1B
Positive Feedback high impedance terminals. ISL28270 and ISL28470
input circuit is shown in Circuit 1A, and the ISL28273 input circuit is
shown in Circuit 1B. It can be used as a REF terminal to adjust or level
shift the output.
ISL28273: to avoid offset drift, it is recommended that the terminals of
the ISL28273 are not overdriven beyond 1V and the input current must
never exceed 5mA.
4, 13
3, 11
18, 26
FB-_A,B
C_D
Circuit 1A,
Circuit 1B
Negative Feedback high impedance terminals. The FB- pins connect to
an external resistor divider to individually set the desired gain of the in-
amp. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and
the ISL28273 input circuit is shown in Circuit 1B.
ISL28273: to avoid offset drift, it is recommended that the terminals of
the ISL28273 are not overdriven beyond 1V and the input current must
never exceed 5mA.
5, 12
4, 10
19, 25
IN-_A,B
C_D
Circuit 1A,
Circuit 1B
High impedance Inverting input terminals. Connect to the low side of
the input source signal. ISL28270 and ISL28470 input circuit is shown
in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B.
ISL28273: to avoid offset drift, it is recommended that the terminals of
the ISL28273 are not overdriven beyond 1V and the input current must
never exceed 5mA.
6, 11
5, 9
20, 24
IN+_A,B
C_D
Circuit 1A,
Circuit 1B
High impedance Non-inverting input terminals. Connect to the high
side of the input source signal. ISL28270 and ISL28470 input circuit is
shown in Circuit 1A, and the ISL28273 input circuit is shown in Circuit
1B.
ISL28273: to avoid offset drift, it is recommended that the terminals of
the ISL28273 are not overdriven beyond 1V and the input current must
never exceed 5mA.
7, 10
6, 8
21, 23
EN_A,B
C_D
Circuit 2
Active LOW logic pins. When pulled above 2V, the corresponding
channel turns off and OUT is high impedance. A channel is enabled
when pulled below 0.8V. Built-in pull downs define each EN pin LOW
when left floating.
ISL28270, ISL28273, ISL28470
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