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参数资料
| 型号： | ISL29033IROZ-T7 |
| 厂商： | Intersil |
| 文件页数： | 9/15页 |
| 文件大小： | 0K |
| 描述： | IC PHOTO DETECTOR AMBIENT 6-ODFN |
| 标准包装： | 3,000 |
| 带接近传感器： | 无 |
| 波长： | 540nm |
| 电源电压： | 2.25 V ~ 3.63 V |
| 输出类型： | 电流 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-WDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
ISL29033
2. Interrupt Persist: Bits 1 and 0. The interrupt pin and the
interrupt flag are triggered or set when the data sensor
reading is out of the interrupt threshold window after m
consecutive number of integration cycles (Table 4). The
interrupt persist bits determine m.
TABLE 4. INTERRUPT PERSIST
ADDRESS
(HEX)
02
TABLE 7. DATA REGISTERS
CONTENTS
D0 is LSB for 4-, 8-, 12- or 16-bit resolution; D3 is MSB for
4-bit resolution; D7 is MSB for 8-bit resolution
BIT 1:0
NUMBER OF INTEGRATION CYCLES
03
D15 is MSB for 16-bit resolution; D11 is MSB for 12-bit
resolution
00
01
10
11
1
4
8
16
Interrupt Registers (04, 05, 06 and 07 Hex)
Registers 04 and 05 hex set the low (LO) threshold for the
interrupt pin and the interrupt flag. Register 04 hex is the LSB,
and Register 05 hex is the MSB. By default, the interrupt
Command Register II 01 (Hex)
The second command register has the following functions:
1. Resolution: Bits 3 and 2. Bits 3 and 2 determine the ADC
resolution and the number of clock cycles per conversion
(Table 5). Changing the number of clock cycles does more than
just change the resolution of the device; it also changes the
integration time, which is the period during which the
analog-to-digital (A/D) converter samples the photodiode
threshold LO is 00 hex for both LSB and MSB.
Registers 06 and 07 hex set the high (HI) threshold for the
interrupt pin and the interrupt flag. Register 06 hex is the LSB,
and Register 07 hex is the MSB. By default, the interrupt
threshold HI is FF hex for both LSB and MSB.
Calculating Lux
The ISL29033 ADC output codes, DATA, are directly proportional
to lux in ambient light sensing, as shown in Equation 1.
current signal for a measurement.
E cal = α × DATA
(EQ. 1)
BITS 3:2
00
01
TABLE 5. ADC RESOLUTION DATA WIDTH
NUMBER OF CLOCK CYCLES
2 16 = 65,536
2 12 = 4,096
n-BIT ADC
16
12
In this equation, E cal is the calculated lux reading. The constant,
a, is determined by the full scale range and the ADC maximum
output counts. The constant is independent of the light sources
(fluorescent, incandescent and sunlight) because the light source
IR component is removed during the light signal process. The
α = ---------------------------
Count max
10 2 8 = 256 8
11 2 4 = 16 4
2. Range: Bits 1 and 0. The Full Scale Range (FSR) can be
adjusted through the I 2 C by using Bits 1 and 0. Table 6 lists
the possible values of FSR for the 499k ? R EXT resistor.
constant can also be viewed as the sensitivity (the smallest lux
measurement the device can measure), as shown in Equation 2.
Range ( k )
(EQ. 2)
In this equation, Range(k) is as defined in Table 6. Count max is
the maximum output counts from the ADC.
E cal = -------------------------- × DATA
2
BITS 1:0
00
k
1
TABLE 6. RANGE/FSR LUX
RANGE(k) FSR (LUX) @ ALS SENSING
Range1 125
The transfer function used for n-bits ADC is as shown in
Equation 3:
Range ( k )
n
(EQ. 3)
01
10
11
2
3
4
Range2
Range3
Range4
500
2,000
8,000
In this equation, n = 4, 8, 12 or 16 and is the number of ADC bits
programmed in the command register. The number 2 n
represents the maximum number of counts possible from the
ADC output. Data is the ADC output stored in data
t int = 2 × ------------ = 2 × -----------------------------------------------
f OSC
Data Registers (02 Hex and 03 Hex)
The device has two 8-bit read-only registers to hold the data from
LSB to MSB for the ADC (Table 7). The most significant bit (MSB)
is accessed at 03 hex, and the least significant bit (LSB) is
accessed at 02 hex. For 16-bit resolution, the data is from D0 to
D15; for 12-bit resolution, the data is from D0 to D11; for 8-bit
resolution, the data is from D0 to D7. The registers are refreshed
after every conversion cycle.
9
Registers 02 hex and 03 hex.
Integration and Conversion Time
ADC resolution and f OSC determine the integration time, t int , as
shown in Equation 4.
n 1 n R EXT (EQ. 4)
655kHz × 499k Ω
In this equation, n is the number of bits of resolution, and n = 4,
8, 12 or 16. Therefore, 2 n is the number of clock cycles. The
value of n can be programmed at the command register, Register
01 (hex), Bits 3 and 2 (Table 8).
FN7656.2
February 25, 2013
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