参数资料
型号: ISL34340KIT1Z
厂商: Intersil
文件页数: 5/10页
文件大小: 0K
描述: EVALUATION BOARD FOR ISL34340
标准包装: 1
系列: *
4
FN6255.1
June 23, 2008
POWER-DOWN SUPPLY CURRENT
Total 1.8V Power-Down Supply Current
RSTB = GND;
spec is per device
0.5
mA
Total 3.3V Power-Down Supply Current
1mA
PARALLEL INTERFACE
High Level Input Voltage
VIH
2.0
V
Low Level Input Voltage
VIL
0.8
V
Input Leakage Current
IIN
-10
±0.01
10
A
High Level Output Voltage
VOH
IOH = -2.0mA, VDD_IO = 3V 0.8*VDD_IO
V
Low Level Output Voltage
VOL
IOL = 2.0mA, VDD_IO = 3V
0.2*VDD_IO
V
Output Short Circuit Current
IOSC
50
mA
Output Rise and Fall Times
tOR/tOF
Slew rate control set to min,
CL = 8pF
1ns
Slew rate control set to max,
CL = 8pF
4ns
SERIALIZER PARALLEL INTERFACE
PCLK_IN Frequency
fIN
640
MHz
PCLK_IN Duty Cycle
tIDC
40
50
60
%
Parallel Input Setup Time
tIS
3.6
ns
Parallel Input Hold Time
tIH
1.6
ns
DESERIALIZER PARALLEL INTERFACE
PCLK_OUT Frequency
fOUT
640
MHz
PCLK_OUT Duty Cycle
tODC
50
%
PCLK_OUT Period Jitter (RMS)
tOJ
Clock randomizer off
0.5
%tPCLK
PCLK_OUT Spread Width
tOSPRD
Clock randomizer on
±20
%tPCLK
Time to Parallel Output Data Valid
tDV
Relative to PCLK_OUT
-4.7
5.5
ns
Deserializer Output Latency
tCPD
Part-to-part,
side-channel disabled
4
9
14
PCLK
DESERIALIZER REFERENCE CLOCK (REF_CLK IS FED INTO PCLK_IN)
REF_CLK Lock Time
tPLL
100
s
REF_CLK to PCLK_OUT Clock Maximum
Frequency Offset
PCLK_OUT is the
recovered clock
1500
5000
ppm
HIGH-SPEED TRANSMITTER
HS Differential Output Voltage, Transition Bit
VODTR
TXCN = 0x00
600
825
990
mVP-P
TXCN = 0x0F
1170
mVP-P
TXCN = 0xF0
975
mVP-P
TXCN = 0xFF
1300
mVP-P
HS Differential Output Voltage, Non-Transition
Bit
VODNTR TXCN = 0x00
600
825
990
mVP-P
TXCN = 0x0F
460
mVP-P
TXCN = 0xF0
975
mVP-P
TXCN = 0xFF
600
mVP-P
Electrical Specifications
Unless otherwise indicated, all data is for: VDD_CDR = VDD_CR = 1.8V, VDD_IO = 3.3V,
VDD_TX = VDD_P = VDD_AN = 3.3V, TA = +25°C, Ref_Res = 3.16kΩ, High-speed AC-coupling
capacitor = 27nF. (Continued)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ISL34340
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