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参数资料
| 型号： | ISL36411DRZ-T7 |
| 厂商： | Intersil |
| 文件页数： | 7/12页 |
| 文件大小： | 0K |
| 描述： | IC EQUALIZER REC 11.3GBPS 46QFN |
| 标准包装： | 1 |
| 系列： | QLx™ |
| 应用： | 数据传输 |
| 电源电压： | 1.1 V ~ 1.3 V |
| 封装/外壳： | 46-WFQFN 裸露焊盘 |
| 供应商设备封装： | 46-TQFN |
| 包装： | 标准包装 |
| 安装类型： | 表面贴装 |
| 其它名称： | ISL36411DRZ-T7-DKR-ND ISL36411DRZ-T7DKR ISL36411DRZ-TS-DKR ISL36411DRZ-TS-DKR-ND QLX411RIQT7-DKR QLX411RIQT7-DKR-ND |
ISL36411
4
FN6965.1
March 25, 2010
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VDD to GND). . . . . . . . . . . . . -0.3V to 1.5V
Voltage at All Input Pins . . . . . . . . . . . . . . . . -0.3V to 1.5V
ESD Ratings
Human Body Model
High-Speed Pins . . . . . . . . . . . . . . . . . . . . . . . . . 1.5kV
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
46 Ld QFN Package (Notes 4, 5) . .
33
2.8
Operating Ambient Temperature Range. . . . . . 0°C to +85°C
Storage Ambient Temperature Range . . . . . -55°C to +150°C
Maximum Junction Temperature. . . . . . . . . . . . . . . +125°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTE:
4. θJA measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Operating Conditions
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
Supply Voltage
VDD
1.1
1.2
1.3
V
Operating Ambient Temperature
TA
025
85
°C
Bit Rate
NRZ data applied to any channel
2.5
11.1
Gbps
Control Pin Characteristics VDD = 1.2V, TA = +25°C, and VIN = 600mVP-P, unless otherwise noted.
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
Output LOW Logic Level
VOL
LOS[k]
0
250
mV
Output HIGH Logic Level
VOH
LOS[k]
750
VDD
mV
Input Current
Current draw on digital pin, i.e.,
CP[k][A,B]
100
200
A
Electrical Specifications VDD = 1.2V, TA = +25°C, and VIN = 600mVP-P, unless otherwise noted.
PARAMETERS
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
NOTES
Supply Current
IDD
368
mA
Cable Input Amplitude
Range
VIN
Measured differentially at data source
before encountering channel loss; Up to
10m 28AWG standard twin-axial cable
(approx. -27dB @ 5GHz)
600
1600
mVP-P
DC Differential Input
Resistance
Measured on input channel IN[k]
80
100
120
Ω
DC Single-Ended Input
Resistance
Measured on input channel IN[k]P or
IN[k]N, with respect to VDD
40
50
60
Ω
Input Return Loss Limit
(Differential)
SDD11
100MHz to 4.1GHz
Note 7
dB
4.1GHz to 11.1GHz
Note 8
dB
Input Return Loss Limit
(Common Mode)
SCC11
100MHz to 2.5GHz
Note 9
dB
2.5GHz to 11.1GHz
-3
dB
Input Return Loss Limit
(Com. to Diff. Conversion)
SDC11
100MHz to 11.1GHz
-10
dB
Output Amplitude Range
VOUT
Measured differentially at OUT[k]P and
OUT[k]N with 50Ω load on both output
pins
450
600
850
mVP-P
Differential Output
Impedance
Measured on OUT[k]
80
105
120
Ω
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