参数资料
型号: ISL43410IR-T
厂商: Intersil
文件页数: 10/13页
文件大小: 0K
描述: IC SWITCH DPDT 16QFN
标准包装: 6,000
功能: 开关
电路: 1 x DPDT
导通状态电阻: 50 欧姆
电压电源: 单电源
电压 - 电源,单路/双路(±): 2 V ~ 12 V
电流 - 电源: 100pA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-VFQFN 裸露焊盘
供应商设备封装: 16-QFN-EP(3x3)
包装: 带卷 (TR)
6
FN6044.4
May 12, 2008
DYNAMIC CHARACTERISTICS
Inhibit Turn-ON Time, tON
V
+ = 10.8V, V
NO or VNC = 10V, RL = 300Ω, CL = 35pF
VIN = 0 to 4, (see Figure 1)
25
-
25
-
ns
Full
-
30
-
ns
Inhibit Turn-OFF Time, tOFF
V
+ = 10.8V, V
NO or VNC = 10V, RL = 300Ω, CL = 35pF
VIN = 0 to 4, (see Figure 1)
25
-
24
-
ns
Full
-
30
-
ns
Address Transition Time, tTRANS
V
+ = 10.8V, V
NO or VNC = 10V, RL = 300Ω, CL = 35pF
VIN = 0 to 4, (see Figure 1)
25
-
35
-
ns
Full
-
50
-
ns
Break-Before-Make Time Delay, tD
V
+ = 13.0V, R
L = 300Ω, CL = 35pF, VNO or VNC = 10V
VIN = 0 to 4 (see Figure 3)
Full
-
9
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω (see Figure 2)
25
-
1.2
-
pC
OFF-Isolation
RL = 50Ω, CL = 5pF, f = 1MHz, (see Figure 4)
25
-
75
-
dB
Crosstalk (Channel-to-Channel)
RL = 50Ω, CL = 5pF, f = 1MHz, (see Figure 6)
25
-
-85
-
dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, (see Figure 7)
25
-
4
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, (see Figure 7)
25
-
6
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, (see Figure 7)
25
-
12
-
pF
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 13.0V, VIN = 0V or V+, all channels on or off
Full
-1
0.0001
1
A
NOTES:
6. VIN = input voltage to perform proper function.
7. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
8. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at +25°C.
9.
Δr
ON = rON (MAX) - rON (MIN).
10. Flatness is defined as the difference between the maximum and minimum value of ON-resistance over the specified analog signal range.
11. Limits established by characterization and are not production tested.
12. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for other switches. CL includes fixture and stray
capacitance.
FIGURE 1B. TEST CIRCUIT
Electrical Specifications + 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 6),
Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 7, 12)
TYP
MAX
(Notes 7, 12) UNITS
50%
tr < 20ns
tf < 20ns
tON
3V
0V
tOFF
LOGIC
INPUT
SWITCH
OUTPUT
90%
0V
90%
VOUT
V
OUT
V
(NO or NC)
R
L
R
L
r
ON
+
------------------------
=
LOGIC
INPUT
VOUT
RL
COM
NC
INH
300
Ω
35pF
GND
V+
C
NO
CL
V+
ADD
C
ISL43410
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