参数资料
型号: ISL54053IRUZ-T
厂商: INTERSIL CORP
元件分类: 运动控制电子
英文描述: Ultra Low ON-Resistance, Low Voltage, Single Supply, SPDT Analog Switch
中文描述: 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO6
封装: 1.20 X 1MM, 0.50 MM HEIGHT, 0.40 MM PITCH, ROHS COMPLIANT, PLASTIC, MO-255, UTDFN-6
文件页数: 8/11页
文件大小: 306K
代理商: ISL54053IRUZ-T
8
FN6460.0
March 16, 2007
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
This family of switches cannot be operated with bipolar
supplies because the input switching point becomes
negative in this configuration.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.5V and 1.4V)
over a supply range of 2V to 5V (see Figure 15). At 5V the
V
IH
level is about 1.2V. This is still below the 1.8V CMOS
guaranteed high output minimum level of 1.4V, but noise
margin is reduced.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50
Ω
systems, the ISL54053 has a -3dB bandwidth of
190MHz (see Figure 16). The frequency response is very
consistent over a wide V+ range, and for varying analog
signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off isolation is
the resistance to this feedthrough, while crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 17 details the high off isolation and crosstalk rejection
provided by this family. At 100kHz, off isolation is about 80dB
in 50
Ω
systems, decreasing approximately 20dB per decade
as frequency increases. Higher load impedances decrease
off isolation and crosstalk rejection due to the voltage divider
action of the switch OFF impedance and the load
impedance.
Leakage Considerations
ESD protection diodes are internally connected between each
analog-signal pin and both V+ and GND. One of these diodes
conducts if any analog signal exceeds V+ or GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analog-
signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.
Typical Performance Curves
T
A
= +25°C, Unless Otherwise Specified
FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
FIGURE 10. ON-RESISTANCE vs SWITCH VOLTAGE
0
0.5
1.0
1.5
2.0
2.5
r
O
Ω
)
V
COM
(V)
0
1
2
3
4
5
V+ = 4.5V
V+ = 1.8V
V+ = 2.7V
V+ = 5V
V+ = 3V
I
COM
= 100mA
r
O
Ω
)
V
COM
(V)
0
1
2
3
5
0.2
0.3
0.4
0.5
0.6
0.8
0.9
1.0
4
+25
°
C
+85
°
C
-40
°
C
V+ = 5V
I
COM
= 100mA
0.7
ISL54053
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