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| 型号： | ISL54059EVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 13/14页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL54059 |
| 标准包装： | 1 |
| 主要目的： | 接口，2:1 多路复用器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ISL54059 |
| 主要属性： | 2 x SPDT 模拟开关 |
| 次要属性： | 1.8 V ~ 6.5 V 电源 |
| 已供物品： | 板 |
8
FN6579.2
March 11, 2011
Detailed Description
The ISL54059 is a bi-directional, dual single pole-double
throw (SPDT) analog switch that offers precise switching
from a single 1.8V to 6.5V supply with low ON-resistance
(0.83
Ω) and high speed operation (tON =55ns, tOFF = 18ns).
The device is especially well suited for portable battery
powered equipment due to its low operating supply voltage
(1.8V), low power consumption (8nA), and a tiny 1.8x1.4mm
TQFN package or a 3x3mm TDFN package. The low
ON-resistance and rON flatness provide very low insertion
loss and signal distortion for applications that require signal
switching with minimal interference by the switch.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. The ISL54059
contains ESD protection diodes on each pin of the IC
(see Figure 8). These diodes connect to either a +Ring or
-Ring for ESD protection. To prevent forward biasing the
ESD diodes to the +Ring, V+ must be applied before any
input signals, and the input signal voltages must remain
between recommended operating range.
If these conditions cannot be guaranteed, then precautions
must be implemented to prohibit the current and voltage at
the logic pin and signal pins from exceeding the maximum
ratings of the switch. The following two methods can be used
to provided additional protection to limit the current in the
event that the voltage at a logic pin or switch terminal goes
above the V+ rail.
Logic inputs can be protected by adding a 1k
Ω resistor in
series with the logic input (see Figure 8). The resistor limits
FIGURE 4. OFF-ISOLATION TEST CIRCUIT
FIGURE 5. rON TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
ANALYZER
RL
SIGNAL
GENERATOR
V+
C
0V OR V+
NO OR NC
COM
IN
GND
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
*50
Ω SOURCE
V+
C
0V OR V+
NO OR NC
COM
IN
GND
VNX
V1
rON = V1/100mA
100mA
Repeat test for all switches.
0V OR V+
ANALYZER
V+
C
NO1 OR NC1
SIGNAL
GENERATOR
RL
GND
INX
COM1
50
Ω
NC
COM2
NC2 OR NO2
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
*50
Ω SOURCE
V+
C
GND
NO OR NC
COM
IN
IMPEDANCE
ANALYZER
0V OR V+
COM is connected to NO or NC
during ON capacitance measurement.
ISL54059
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL54059IRTZ | 功能描述:IC SWITCH DUAL SPDT 10TDFN RoHS:是 类别:集成电路 (IC) >> 接口 - 模拟开关，多路复用器，多路分解器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:36 系列:- 功能:多路复用器 电路:2 x 4:1 导通状态电阻:75 欧姆 电压电源:单/双电源 电压 - 电源，单路/双路(±):2 V ~ 12 V，±2 V ~ 6 V 电流 - 电源:- 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:20-SOIC（0.295"，7.50mm 宽） 供应商设备封装:20-SOIC W 包装:管件 |
| ISL54059IRTZ-T | 功能描述:IC SWITCH DUAL SPDT 10TDFN RoHS:是 类别:集成电路 (IC) >> 接口 - 模拟开关，多路复用器，多路分解器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:36 系列:- 功能:多路复用器 电路:2 x 4:1 导通状态电阻:75 欧姆 电压电源:单/双电源 电压 - 电源，单路/双路(±):2 V ~ 12 V，±2 V ~ 6 V 电流 - 电源:- 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:20-SOIC（0.295"，7.50mm 宽） 供应商设备封装:20-SOIC W 包装:管件 |
| ISL54059IRUZ-T | 功能描述:IC SWITCH DUAL SPDT 10UTQFN RoHS:是 类别:集成电路 (IC) >> 接口 - 模拟开关，多路复用器，多路分解器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:36 系列:- 功能:多路复用器 电路:2 x 4:1 导通状态电阻:75 欧姆 电压电源:单/双电源 电压 - 电源，单路/双路(±):2 V ~ 12 V，±2 V ~ 6 V 电流 - 电源:- 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:20-SOIC（0.295"，7.50mm 宽） 供应商设备封装:20-SOIC W 包装:管件 |
| ISL54060 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Negative Signal Swing, Sub-ohm, Dual SPST Single Supply Switch |
| ISL54060_09 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:+1.8V to +6.5V, Sub-ohm, Dual SPST Analog Switch with Negative Signal Capability |
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