参数资料
型号: ISL54206IRZ-T
厂商: INTERSIL CORP
元件分类: 运动控制电子
英文描述: MP3/USB 2.0 High Speed Switch with Negative Signal Handling
中文描述: 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO10
封装: 3 X 3 MM, ROHS COMPLIANT, PLASTIC, MO-229WEED-3, TDFN-10
文件页数: 13/13页
文件大小: 338K
代理商: ISL54206IRZ-T
13
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FN6409.0
December 18, 2006
ISL54206
Thin Dual Flat No-Lead Plastic Package (TDFN)
//
NX (b)
SECTION "C-C"
FOR ODD TERMINAL/SIDE
e
C C
5
C
TERMINAL TIP
(A1)
BOTTOM VIEW
A
6
AREA
INDEX
C
C
0.10
0.08
SIDE VIEW
0.10
2X
E
A
B
C
0.10
D
TOP VIEW
C B
2X
6
8
AREA
INDEX
NX L
E2
E2/2
REF.
e
(Nd-1)Xe
N
(DATUM A)
(DATUM B)
5
0.10
8
7
D2
B
A
C
N-1
1
2
PLANE
SEATING
C
A
A3
NX b
D2/2
NX k
L1
9L
M
L10.3x3A
10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
SYMBOL
MILLIMETERS
NOTES
MIN
NOMINAL
MAX
A
0.70
0.75
0.80
-
A1
-
-
0.05
-
A3
0.20 REF
-
b
0.20
0.25
0.30
5, 8
D
2.95
3.0
3.05
-
D2
2.25
2.30
2.35
7, 8
E
2.95
3.0
3.05
-
E2
1.45
1.50
1.55
7, 8
e
0.50 BSC
-
k
0.25
-
-
-
L
0.25
0.30
0.35
8
N
10
2
Nd
5
3
Rev. 3 3/06
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd refers to the number of terminals on D.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
9. Compliant to JEDEC MO-229-WEED-3 except for D2
dimensions.
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ISL54207 Low Voltage, Dual SPDT, USB/CVBS/ Audio Switches, with Negative Signal Capability
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