参数资料
型号: ISL55110EVAL2Z
厂商: Intersil
文件页数: 1/4页
文件大小: 0K
描述: EVALUATION BOARD FOR ISL55110
标准包装: 1
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ISL55110_11EVAL1Z, ISL55110_11EVAL2Z
Evaluation Board User ’s Manual
Before Getting Started
Application Note
February 13, 2007
AN1283.0
This document supplements the ISL55110, ISL55111
Specification FN6228 . Evaluation board users should review
that document to obtain information on the parts’ basic
functionality and power requirements. A most important note
is before powering up the board, review the Power Up
SCOPE PROBE CONNECTIONS
DIF+
DIF-
DRIVER INPUT
Sequence in that specification. There are two DC sources
utilized, so a user may inadvertently mis-apply the power
sources causing damage to the part.
Take time to review the ISL55110, ISL55111 Data Sheet
(FN6228) and become familiar with the part’s basic functions
IN_B - BNC
R1
50 Ω
GND
T P-IN_ B
DIF+
DIF-
0 Ω
and power options. Note also that FN6228 supersedes this
document with respect to updates and modifications. Always
refer to that document if discrepancies occur.
DIF+
DIF-
R3 R5
0 Ω
C6 C8
NOT NOT
POPULATED POPULATED
OB - BNC
DRIVER OUT
All ISL55110, ISL55111 QFN and TSSOP boards are
designed essentially in the same fashion. This document
provides the user with the information regarding the
evaluation board design, circuitry layout and driver load
options.
Scope Probe Connections
Another topic to cover before getting started is the evaluation
board physical connections for waveform observations. On
each schematic version you will see a component with pins
designated as DIF+ and DIF-. This is not an active
component but a dual pin header physically designed to
accommodate leadless connection of active differential or
FET Probes. This will minimize ground lead inductance and
capacitive loading while making waveform observations.
However, the user must also be mindful of max voltage
limitations when using these types of probes. The ISL55110,
ISL55111 drivers cover a large voltage range, so double
check the probe’s specifications.
Scope Probe Test Points (TP) are provisioned across all
inputs, outputs and VDD/VH to ground.
TP-OB
GND
FIGURE 1. DUAL.1” SPACED PINS ARE PLACED ON THE
EVALUATIONS BOARDS FOR LEADLESS ACTIVE
PROBE CONNECTIONS
BNC Connections
This series of evaluation boards also provides BNC
connections for Input and Output signals. A key point to
remember is the ISL55110, ISL55111 Driver Outputs
(OA/OB) operate with the VH voltage as a High and Ground
as a Low. These connectors are laid out to accommodate
SMD connectors as well as BNC’s. Also note that the Driver
Inputs have 50 Ω terminations that you may need to remove
for your application.
Power Down Feature
All boards provide the same capability for testing the Power
Down Feature. A SPDT- Center OFF switch is provided for
manual testing of the feature. In one position the PD input is
connected to VDD (Power Down Enabled). In the other
position the PD Input is connected to Ground.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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