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参数资料
| 型号： | ISL55141 |
| 厂商： | Intersil Corporation |
| 英文描述： | High-Speed 18V CMOS Comparators(高速18V CMOS比较器) |
| 中文描述： | 高速18V的CMOS比较器（高速18V的的CMOS比较器） |
| 文件页数： | 6/14页 |
| 文件大小： | 370K |
| 代理商： | ISL55141 |
6
FN6230.0
July 17, 2006
Application Information
The ISL55141, ISL55142, ISL55143 provide 1, 2 and 4 dual
threshold, three-state window comparator(s) in TSSOP or
QFN footprints. They offer a combination of speed (10ns Tpd
and wide voltage range (18V). This product directly
addresses the need for unique common-mode
characterisitics while supplying a power-down feature.
Figures 3 and 4 show the stimulus setup and measurement
points for an example propagation delay measurement.
Typical room temperature results are displayed in Figure 11.
Figure 4 shows a V
INP
range of 50mV. In Figure 11 the offset
is increased in the horizontal axis from 50mV above and
below the reference (1.5V) up to 2.5V above and below the
1.5V reference.
Two lines are displayed in Figure 11. One represents the
rising-to-rising delay (t
PDLH
)
and the other the
falling-to-falling delay (t
PDHL
).
Comparator Features
These three-state window comparators feature high output
current capability, and user defined high and low output levels
to interface with a wide variety of logic families. Each receiver
comprises two comparators and each comparator has an
independent threshold level input, making it easy to
implement (Minimum1-V
IH
)/(Maximum 0-V
IL
) logic level
comparator functions. The CV
AX
and CV
BX
pins set the
threshold levels of the A and B comparators respectively. V
OH
and V
OL
set all the comparator output levels, and V
OH
must
be more positive than V
OL
. These two inputs are unbuffered
supply pins, so the sources driving these pins must provide
adequate current for the expected load. V
OH
and V
OL
typically connect to the power supplies of the logic device
driven by the comparator outputs.
The truth table for the receivers is given in Table 1. Receiver
outputs are not tri-statable, and do not incorporate any on-chip
short circuit current protection. Momentary short circuits to
GND, or any supply voltage, will not cause permanent
damage, but care must be taken to avoid longer duration short
circuits. If tolerable to the application, current limiting resistors
can be inserted in series with the Q
AX
and Q
BX
outputs to
protect the receiver outputs from damage due to overcurrent
conditions.
Power-down Features
The ISL55141, ISL55142, ISL55143 PD pin provides a
means of reducing current consumption when the device is
not in use. Supply currents falls from ~7mA to less than
10μA in the power-down mode. The device requires
approximately 10μs to power-down and 15μs to power-up.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended, lead lengths
should be as short as possible, and the power supply pins
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the V
EE
pin is
connected to ground, one 0.1μF ceramic capacitor should be
placed from the V
CC
pin to ground. A 4.7μF tantalum
capacitor should then be connected from the V
CC
pin to
ground. This same capacitor combination should be placed
at each supply pin to ground if split supplies are to be used.
FIGURE 3. t
pd
RECEIVER SWITCHING TEST CIRCUIT
FIGURE 4.
t
pd
RECEIVER PROPAGATION DELAY
MEASUREMENT POINTS
Test Circuits and Waveforms
(Continued)
+
-
+
-
V
INP
Q
A
Q
B
+11 V
CC
-3 V
EE
CV
A
1.5V
CV
B
1.5V
+
5V-V
OH
V
OL
Q
X
50mV
-50mV
t
PDLH
V
OH
(
≈
5V)
V
OL
(
≈
0V)
50%
50%
t
PDHL
V
INP
1.5V
1.5V
CV
A
= CV
B
= 1.5V
ISL55141, ISL55142, ISL55143
相关PDF资料 |
PDF描述 |
|---|---|
| ISL55143 | High-Speed 18V CMOS Comparators(高速18V CMOS比较器) |
| ISL55191 | Single and Dual Ultra-Low Noise, Ultra-Low Distortion, Rail-to-Rail, Low Power Op Amp |
| ISL55191EVAL1Z | Single and Dual Ultra-Low Noise, Ultra-Low Distortion, Rail-to-Rail, Low Power Op Amp |
| ISL55191IBZ | Single and Dual Ultra-Low Noise, Ultra-Low Distortion, Rail-to-Rail, Low Power Op Amp |
| ISL55191IBZ-T13 | Single and Dual Ultra-Low Noise, Ultra-Low Distortion, Rail-to-Rail, Low Power Op Amp |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL55141_0607 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Speed 18V CMOS Comparators |
| ISL55141_11 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High-Speed 18V CMOS Comparators |
| ISL55141IRZ | 功能描述:IC COMP CMOS HS 18V 16-QFN RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| ISL55141IRZ-T | 功能描述:IC COMP CMOS HS 18V 16-QFN RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| ISL55141IVZ | 功能描述:IC COMP CMOS HS 18V 14-TSSOP RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
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