参数资料
型号: ISL59114IRUZ-T7
厂商: Intersil
文件页数: 10/10页
文件大小: 0K
描述: IC VIDEO DRVR YC LPF 10-TQFN
标准包装: 3,000
应用: 重构滤波器
输出类型: 满摆幅
电路数: 3
-3db带宽: 8.8MHz
转换速率: 40 V/µs
电流 - 电源: 3.1mA
电流 - 输出 / 通道: 145mA
电压 - 电源,单路/双路(±): 2.5 V ~ 3.6 V
安装类型: 表面贴装
封装/外壳: 10-UFQFN
供应商设备封装: 10-UTQFN(2.1x1.6)
包装: 带卷 (TR)
9
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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For information regarding Intersil Corporation and its products, see www.intersil.com
FN6184.2
September 21, 2006
Power Dissipation
With the high output drive capability of the ISL59114, it is
possible to exceed the +125°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
Θ
JA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
for sourcing:
for sinking:
Where:
VS = Supply voltage
ISMAX = Maximum quiescent supply current
VOUT = Maximum output voltage of the application
RLOAD = Load resistance tied to ground
ILOAD = Load current
Power Supply Bypassing Printed Circuit Board
Layout
As with any modern operational amplifier, a good printed
circuit board layout is necessary for optimum performance.
Lead lengths should be as short as possible. The power
supply pin must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, a single
4.7F tantalum capacitor in parallel with a 0.1F ceramic
capacitor from VS+ to GND will suffice.
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance.
PD
MAX
T
JMAX
T
AMAX
Θ
JA
---------------------------------------------
=
PD
MAX
V
S
I
SMAX
V
S
V
OUT
()
+
×
V
OUT
R
L
----------------
×
=
PD
MAX
V
S
I
SMAX
V
OUT
V
S
()
+
×
I
LOAD
×
=
ISL59114
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