参数资料
型号: ISL59311IRZ
厂商: Intersil
文件页数: 3/14页
文件大小: 0K
描述: IC VIDEO AMP TRI DIFF 32-QFN
标准包装: 60
应用: 差分
输出类型: 差分
电路数: 3
-3db带宽: 650MHz
转换速率: 1500 V/µs
电流 - 电源: 7mA
电流 - 输出 / 通道: 60mA
电压 - 电源,单路/双路(±): 4.5 V ~ 5.5 V
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-QFN 裸露焊盘(5x6)
包装: 散装
产品目录页面: 1235 (CN2011-ZH PDF)
11
FN6372.3
April 25, 2007
Twisted Pair Termination
The schematic in Figure 20 illustrates a termination scheme
for 50
Ω series termination and a 100Ω twisted pair cable.
Note RCM is the common mode termination to allow
measurement of VCM and should not be too small since it
loads the ISL59311; a little over a 100
Ω is recommended for
RCM.
Video Transmission
The ISL59311 is a twisted pair differential line driver directed
at the transmission of Video Signals through cables up to
100 feet; however, as signal losses increase with
transmission line length the ISL59311 will need additional
support to equalize video signals along longer twisted pair
transmission lines. A full solution to accomplish this is the
SXGA Video Transmission System presented in the
ISL59311 Data Sheet. Note the inclusion of the EL9111 for
signal equalization of up to 1000ft of CAT5 cable and
common mode extraction; see Data Sheet for additional
information on the EL9111.
Long Distance Video Transmission
The SXGA Video Transmission System makes it possible to
transmit Red, Green and Blue (RGB) video plus sync up to
1000ft through CAT5 cable. The input to the SXGA Video
Transmission System is the output of a video source
transmitting RGB video signals plus sync. The signals are
received initially by the ISL59311; which converts the single
ended input RGB signals to three fully differential waveforms
with sync encoded on the discrete common modes of each
color channel and then drives the signals through a length of
CAT5 cable. The signal is received by the EL9111, which can
provide 6-pole equalization for both high and low frequency
signal transmission line losses. Then the EL9111 converts
the differential RGB video signals back into single ended
format while extracting the common mode component for
decoding. The single ended RGB signal is taken directly
from the output of the EL9111 and is ready for the output
device. The EL9111 Common Mode Decoder Circuit
receives the common mode signals and decodes them and
transmits HSYNC and VSYNC to the output device.
Disabling the Amplifiers with the Disable Pin
The Disable pin must be a logic low for normal operation of
the video amplifiers. When Disable is taken high, the
amplifiers are disabled, reducing supply VCCA supply
current. (The Disable pin has no effect on the Serial Digital
Transceiver - it is always enabled as long as power is
applied to VCCD.)
Serial Digital Transceiver Operation
The digital transceiver is a half-duplex design, either
receiving data on the SIN pins and sending it out on the
SDATA pin, or transmitting data from the SDATA pin out on
some the 2 SOUT pins. The digital transceiver operates in a
high speed (up to 50MBaud) differential mode. The SDATA
pin is the half-duplex logic-level transmit and receive data
pin. SDATA is an output when Transmit = low (receive mode)
and an input when Transmit = high (transmit mode). This can
be made to work with existing designs that use independent
transmit and receive pins by connecting SDATA directly to the
transmit pin and through a resistor to the receive pin.
Figure 21 shows an example of how to interface the
ISL59311 with an RS485 transceiver.
VCCD is the power source for the digital line interface drivers
and receivers.
-
+
-
+
-
+
VINAVOUTA
DISABLE
VREF
-
+
-
+
-
+
VINBVOUTB
DISABLE
VREF
-
+
-
+
-
+
VINCVOUTC
DISABLE
VREF
LOGIC
DECODING
CMA
CMB
CMC
VSYNC
HSYNC
DISABLE
DIS
A
B
L
E
FIGURE 19. VIDEO DRIVER BLOCK DIAGRAM
-
+
VREF
-
+
TWISTED
PAIR
ZO=100Ω
50
Ω
50
Ω
50
Ω
50
Ω
120
Ω
VCM
(RCM: SHOULD BE >100
Ω)
(FOR LOADING
CONSIDERATIONS)
FIGURE 20. TWISTED PAIR TERMINATION
ISL59311
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