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参数资料
| 型号： | ISL6115AIBZ |
| 厂商： | Intersil |
| 文件页数： | 10/10页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR POWER DIST 12V 8-SOIC |
| 标准包装： | 98 |
| 类型： | 热交换控制器 |
| 应用： | 通用 |
| 内部开关： | 无 |
| 电源电压： | 10.2 V ~ 13.8 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 管件 |
ISL6115A
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
M
0.25(0.010)
B M
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A 0.0532 0.0688 1.35 1.75 -
1
2
3
L
A1
B
0.0040
0.013
0.0098
0.020
0.10
0.33
0.25
0.51
-
9
SEATING PLANE
C
0.0075
0.0098
0.19
0.25
-
-A-
D
A
h x 45°
D
E
0.1890
0.1497
0.1968
0.1574
4.80
3.80
5.00
4.00
3
4
-C-
e
B
M
0.25(0.010) C A M B S
NOTES:
A1
α
0.10(0.004)
C
e
H
h
L
N
a
0.050 BSC
0.2284 0.2440
0.0099 0.0196
0.016 0.050
8
0°
8°
1.27 BSC
5.80 6.20
0.25 0.50
0.40 1.27
8
0°
8°
-
-
5
6
7
-
1. Symbols are defined in the “MO Series Symbol List” in Sec-
tion 2.2 of Publication Number 95.
Rev. 1 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
3. Dimension “D” does not include mold flash, protrusions or
gate burrs. Mold flash, protrusion and gate burrs shall not
exceed 0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm
(0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a vi-
sual index feature must be located within the crosshatched
area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or
greater above the seating plane, shall not exceed a maxi-
mum value of 0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
10
FN6855.1
April 23, 2010
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