参数资料
型号: ISL6120CBZA
厂商: Intersil
文件页数: 3/13页
文件大小: 0K
描述: IC CTRLR POWER DISTRIB 8-SOIC
标准包装: 98
类型: 热交换控制器
应用: 通用
内部开关:
电源电压: 9 V ~ 15 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 管件
ISL6115, ISL6116, ISL6117, ISL6120
Pin Descriptions
PIN # SYMBOL
FUNCTION
DESCRIPTION
1
ISET
Current Set
Connect to the low side of the current sense resistor through the current limiting set resistor.
This pin functions as the current limit programming pin.
2
ISEN
Current Sense
Connect to the more positive end of sense resistor to measure the voltage drop across this
resistor.
3
4
5
GATE
VSS
VDD
External FET Gate
Drive Pin
Chip Return
Chip Supply
Connect to the gate of the external N-Channel MOSFET. A capacitor from this node to
ground sets the turn-on ramp. At turn-on this capacitor will be charged to V DD +5V
(ISL6115) and to V DD (ISL6116, ISL6117, ISL6120) by a 10μA current source.
12V chip supply. This can be either connected directly to the +12V rail supplying the
switched load voltage or to a dedicated V SS +12V supply.
6
CTIM
Current Limit Timing
Capacitor
Connect a capacitor from this pin to ground. This capacitor determines the time delay
between an overcurrent event and chip output shutdown (current limit time-out). The
duration of current limit time-out is equal to 93k Ω x C TIM .
7
PGOOD
Power Good Indicator Indicates that the voltage on the ISEN pin is satisfactory. PGOOD is driven by an open
drain N-Channel MOSFET and is pulled low when the output voltage (VISEN) is less than
the UV level for the particular IC.
8
PWRON
Power-ON
PWRON is used to control and reset the chip. The chip is enabled when PWRON pin is
driven high to a maximum of 5V or is left open. Do not drive this input >5V. After a
current limit time-out, the chip is reset by a low level signal applied to this pin. This input
has 20μA pull-up capability.
3
FN9100.7
April 29, 2010
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