参数资料
型号: ISL6173EVAL1
厂商: Intersil
文件页数: 8/26页
文件大小: 0K
描述: EVALUATION BOARD FOR ISL6173
标准包装: 1
主要目的: 电源管理,热交换控制器
已用 IC / 零件: ISL6173
已供物品:
Technical Brief 457
HIP1012A (+5V and +3.3V)
Figures 23 and 24 show the HIP1012A dual Hot Swap
controller. To configure for +3.3V and +5V, remove JP1, and
apply a function generator at pin2 of JP1 for (PWRON2)’.
Figures 25 and 26 show the HIP1012A dual Hot Swap
controller load card.
TABLE 1. HOT SWAP CONTROLLER LOAD CARD
Figures 29 and 30 both show the same event. Figure 29
shows 5VG and Figure 30 shows I 3.3V . Controller is
shutdown by forcing PWRON2 high.
Figures 31 and 32 show turning on into an OC condition.
Figure 31 shows 3/12VG and PWRON2, while Figure 32
shows I 5V and PGOOD. An OC event occurs when the
current through the sense resistor exceeds the user
programmed OC threshold (see data sheet). The controller
3.3V LOAD
00 = Off
01 = 1.0 ? (3.3A)
10 = 1.8 ? (1.8A)
11 = 0.7 ? (4.7A)
5V LOAD
00 = Off
01 = 10.1 ? (0.5A)
10 = 7.0 ? (0.7A)
11 = 4.2 ? (1.2A)
enters CR mode and capacitor CTIM begins charging. The
nominal time-out period is CTIM x 200k ? .
Both Figures 33 and 34 show an OC event. Figure 33 shows
a 700mA to 1.2A load step into OC range during normal
operation, while Figure 34 shows a short occurring during
normal operation. Notice that in the “short condition”, Figure
34, 5VG is pulled instantly to GND, then slowly ramped up.
Both Figures 27 and 28 show the same event. Figure 27
shows 5VG and Figure 28 shows I 3.3V . After PWRON2 is
asserted (forced low), notice the soft-start ramp of 3/12VG to
assure inrush current is limited. Observe the PGOOD delay
as well.
HIP1012A (+5V and +3.3V) Figures
An OC event occurs on the 5V line. Notice that the 3.3V line
continues operating normally until CTIM times out and the
device latches off (see Figure 35).
3 /12VIN
GND
CEC1
JP2
Q 2
R 4
20 ?
R 2
20m ?
C 1
C 4
0.01μF
CEC2
3 / 12VOUT
GND
GND
0.1μF
GND
5V IN
1
JP1
1
2
U1
3/12VS
3/12VG
JP3
3/12ISEN
RILIM
14
13
10k ?
R 5
5VOUT
V DD
0.1μF
C 5
3
V DD
JP4 4 MODE/
PWRON1
5
PWRON2
6
5VG
7
5VS
GND
CPUMP
CTIM
PGOOD
5VISEN
12
11
10
9
8
C 2
0.047μF
R 101
Q 1
R 3
20 ?
C 3
0.01μF
LED1
R 1
100m ?
Note: Test point number equals HIP1012A pin number.
FIGURE 23. HIP1012A EVAL BOARD SCHEMATIC
8
TB457.0
April 18, 2006
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